Programmable Clock Alignment Using Parallel Delay Switching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing clock and strobe alignment techniques suffer from inaccuracies due to voltage and temperature variations, leading to glitches and functional errors, and require toggling edges for updates, which can cause significant delays.
Innovation Solution
A system and method using parallel programmable delay units with a switch and control logic to adjust and swap clocks or strobes without causing glitches, allowing phase alignment and updates without toggling edges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single programmable delay unit is used to align clock or strobe signals, then the device complexity is low, but alignment accuracy deteriorates due to voltage and temperature drifts causing delay variations
Solution Approach 1:
The patent divides the single delay unit into multiple parallel programmable delay units (first and second delay units). Each unit can be independently adjusted to compensate for voltage and temperature drifts, thereby improving alignment accuracy without significantly increasing overall system complexity.
Solution Approach 2:
The patent dynamically changes the delay parameters of the parallel delay units based on detected voltage and temperature conditions. By adjusting the delay values in response to environmental variations, the system maintains accurate alignment despite drifts in operating conditions.
2Adaptability or versatility
If clock phase alignment is performed by updating delay values during operation, then adaptability to voltage and temperature variations is improved, but glitches arise causing functional errors in downstream logic
Solution Approach 1:
The patent performs preliminary alignment by adjusting the delay values of the parallel delay units before the clock or strobe signals are distributed to downstream logic. This ensures that alignment corrections are completed in advance, preventing glitches from propagating to functional logic during operation.
Solution Approach 2:
The patent introduces an intermediary alignment mechanism that buffers the delay adjustment process. The parallel delay units serve as intermediaries that can be adjusted without directly affecting the downstream logic, allowing safe reconfiguration during operation without causing functional errors.
3Reliability
If strobe switching is initiated by toggling clock edges, then the system operates reliably with synchronized timing, but significant delays occur during long idle states when toggling edges are absent
Solution Approach 1:
The patent enables the strobe switching mechanism to operate autonomously without requiring external clock toggling edges. The system can detect idle states and perform necessary alignment updates self-initiated, eliminating the time loss that would otherwise occur while waiting for the next clock edge during long idle periods.
4Reliability
If parallel programmable delay units with switching are used to achieve glitch-free alignment, then alignment accuracy and reliability are improved, but device complexity increases
Solution Approach 1:
The patent merges the functionality of multiple delay units with the switching mechanism into an integrated alignment system. By combining these components into a unified structure with shared control logic, the patent reduces the overall complexity increase that would result from simply adding parallel delay units and switches.
Data Source
AI summary
The present invention relates to a system (100 or 200) for aligning a programmable clock or strobe. The system (100 or 200) comprises a first programmable delay unit (1a) for receiving the programmable clock or strobe, characterized by a second programmable delay unit (1b) connected in parallel to the first programmable delay unit (1a) for receiving the programmable clock or strobe, a switch (2) for switching one of the two programmable delay units (1a or 1b) to service the programmable clock or strobe so as to allow the other programmable delay unit (1a or 1b) to adjust the other programmable clock or strobe, and a control logic component (3) for handling the switching of the switch (2), in which the switch (2) swaps in the adjusted programmable clock or strobe to service a downstream clocktree or strobe path after the programmable clock or strobe is adjusted. The present invention also relates to a method for aligning a programmable clock or strobe.


