Clock Authentication Circuit Using Compressed Signal Verification
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Solution Overview
Problem
Devices and systems are vulnerable to malicious operations such as hacking and eavesdropping, compromising security and requiring methods to enhance immunity against such threats.
Innovation Solution
A clock authentication circuit (CAC) is implemented to authenticate candidate clock signals against reference clock signals, using compression components and error measurement techniques to determine authenticity, thereby preventing unauthorized access and ensuring secure device operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If clock authentication circuitry is implemented to verify clock signal authenticity, then device security against malicious operations is improved, but device complexity increases
Solution Approach 1:
The system pre-stores authentication data (reference clock signals, compression algorithms, error thresholds) in memory before operation. When a clock signal needs authentication, the pre-configured circuitry immediately processes it without requiring complex real-time decision-making, thus enhancing security while maintaining manageable complexity
Solution Approach 2:
A dedicated clock authentication circuit (CAC) acts as an intermediary component between the clock signal source and the rest of the device. This specialized subsystem handles all authentication operations, isolating the complexity to a specific module rather than distributing it throughout the entire device architecture
2Measurement precision
If compression components are used to compress clock signals for authentication, then authentication accuracy is improved, but signal processing time increases
Solution Approach 1:
The compression and authentication process operates in periodic cycles rather than continuously. The system compresses the clock signal over a predetermined time period, accumulates error measurements across multiple cycles, and compares the average against thresholds. This periodic approach allows sufficient processing time for accurate authentication while maintaining overall system throughput
Solution Approach 2:
The system performs compression and error measurement over an extended predetermined time period longer than the minimum necessary. This excessive processing time ensures that enough data points are collected to achieve high authentication accuracy, even though it increases individual processing time. The trade-off is acceptable because authentication operations are not required to be continuous
Data Source
AI summary
Embodiments of clock authentication circuitry (CAC) are generally described herein. The CAC may comprise a compression component, such as a logic gate, to compress a candidate clock signal that is to be authenticated against a reference clock signal. The CAC may further comprise a digital-to-analog converter (DAC) that may be connected to an analog-to-digital converter (ADC) of the CAC. An ADC output sequence may be generated when a predetermined input sequence is input to the DAC while the DAC and the ADC are driven by the compressed candidate clock signal. The candidate clock signal may be authenticated based on an error measurement between the ADC output sequence and a reference ADC output sequence.