Clock Distribution Circuit Buffer Failure Detection
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Solution Overview
Problem
Conventional mesh clock distribution circuits face difficulties in identifying which buffer has failed when multiple clock buffers break down, due to the short-circuiting of outputs in the final stage, making it challenging to isolate and diagnose the faulty component.
Innovation Solution
The proposed solution involves a clock distribution circuit with multiple stages of buffers configured in a manner that outputs of buffers in the final and middle stages are short-circuited, utilizing selectors and switches to connect and disconnect signals between buffers and flip-flops, allowing for selective input and observation of signals at branch nodes, enabling the detection of buffer failures through a chain-connection and observation circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If outputs of clock buffers in the final stage are short-circuited to reduce skew, then clock distribution uniformity is improved, but fault detection capability deteriorates
Solution Approach 1:
The clock distribution network is segmented into multiple independent test groups, each group containing buffers that can be tested individually. By dividing the network into separable units with controlled connection paths, the system maintains the short-circuit mesh structure for normal operation while enabling isolated testing of individual buffer groups, thus resolving the contradiction between maintaining distribution uniformity and enabling fault detection.
Solution Approach 2:
Test control circuits and observation circuits are introduced as intermediary components that enable fault detection without disrupting the normal short-circuited mesh structure. These intermediary circuits provide additional testing paths that coexist with the operational structure, allowing buffer failure detection while preserving the clock distribution uniformity achieved through output short-circuiting.
2Reliability
If mesh structure with short-circuited outputs is used, then clock skew is reduced, but ease of repair deteriorates
Solution Approach 1:
The mesh structure is divided into manageable test groups that can be independently diagnosed and repaired. Each group contains a specific set of buffers and associated test circuits, allowing technicians to isolate faults to particular segments without needing to analyze the entire mesh network, thus improving ease of repair while maintaining the skew-reducing short-circuit topology.
Solution Approach 2:
Observation circuits provide feedback signals that indicate the operational status of buffers and identify faulty components. This feedback mechanism enables quick fault identification and guides repair efforts directly to the problematic buffers, significantly improving ease of repair while the system maintains its low-skew mesh structure with short-circuited outputs.
Data Source
AI summary
A clock distribution circuit having plural stages of buffers disposed along branch paths for dividing up a clock signal and configured in a manner that outputs of a plurality of buffers in a final stage and/or a middle stage are short-circuited, includes in relation to at least one buffer of a plurality of buffers in the same stage on a branch path, a selector for receiving an output of an adjacent buffer located upstream in terms of chain-connection along which the plurality of buffers are connected in testing, and a signal at a branch node corresponding to the at least one buffer by a first input and a second input respectively, selecting one of the first input and the second input based on a select control signal, and supplying the selected input to the one buffer.