Clock Control Circuit for Voltage Pumping Efficiency
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Solution Overview
Problem
Existing voltage pumping devices for DRAMs face efficiency degradation due to voltage loss caused by the threshold voltage of MOS transistors used as switches, making it difficult to pump high voltages and back-bias voltages to desired levels, especially when supply voltages are lowered.
Innovation Solution
A clock control circuit that boosts the voltage level of the clock signal input to the voltage pump, using a PMOS transistor and capacitor configuration to generate a second clock signal with a higher voltage level, thereby overcoming the voltage loss and enhancing pumping efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a MOS transistor is used as a switch for floating the node in the voltage pump, then the voltage pump can operate with simple structure, but a voltage loss corresponding to the threshold voltage is generated due to the characteristics of the MOS transistor
Solution Approach 1:
A clock control circuit is introduced as an intermediary between the oscillator and the voltage pump. This circuit receives a first clock signal and generates a second clock signal with a voltage level equal to the boosted first voltage, thereby mediating the voltage level mismatch and preventing threshold voltage loss in the MOS transistor switch.
Solution Approach 2:
The clock control circuit performs preliminary voltage boosting on the clock signal before it reaches the voltage pump. By generating the second clock signal with elevated voltage level in advance, the system prepares the necessary voltage conditions to overcome the MOS transistor's threshold voltage loss during the pumping operation.
2Use of energy by moving object
If the supply voltage is lowered to reduce power consumption, then power consumption is reduced, but it becomes more difficult to overcome the voltage loss corresponding to the threshold voltage and pump the high voltage VPP and back-bias voltage VBB to the desired level
Solution Approach 1:
The invention changes the voltage level parameter of the clock signal from the first voltage to the second voltage (equal to the boosted first voltage). This parameter change allows the voltage pump to maintain reliable operation even when the supply voltage is lowered, as the elevated clock signal voltage compensates for the threshold voltage loss in the MOS transistor switch.
3Reliability
If the threshold voltage of the MOS transistor is increased due to body effect, then the transistor can maintain better off-state characteristics, but it becomes more difficult to pump the voltages to the desired level
Solution Approach 1:
The invention converts the harmful effect of threshold voltage loss into a manageable parameter by elevating the clock signal voltage level. The second clock signal's voltage level is set equal to the boosted first voltage, which compensates for the threshold voltage increase due to body effect, allowing the MOS transistor to maintain good off-state characteristics while still achieving the desired pumping capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The clock control circuit effectively boosts the voltage level of the clock input to the voltage pump, allowing for efficient pumping of high voltages and back-bias voltages while preventing efficiency reduction due to MOS transistor threshold voltage losses.
Implementation Method 1
a voltage pumping device using a method for boosting a voltage at a floated node in accordance with a clock toggling effect and a capacitor coupling effect
Data Source
AI summary
A clock control circuit is provided. The clock control circuit includes a voltage supplier for supplying a first voltage in response to a first clock signal, a voltage booster for boosting the first voltage in response to the first clock signal input to the voltage booster, and a clock generator for generating a second clock signal having a voltage level equal to the boosted first voltage in response to the first clock signal.