Clock Control Device for Voltage Droop Management
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Solution Overview
Problem
The existing technologies are inadequate in controlling voltage droop in chips due to sudden increases in load power consumption, leading to supply voltage drops that can cause errors in logic circuits.
Innovation Solution
A device for clock control is introduced, comprising a voltage detecting unit that alerts a clock stretching unit to reduce the clock signal frequency when the supply voltage falls below a threshold, thereby increasing setup time slack and reducing processor load, preventing errors and managing voltage droop.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the processor operates at high clock frequency to maintain data processing performance, then productivity is improved, but voltage droop occurs when load current suddenly increases causing timing errors
Solution Approach 1:
The clock frequency is made dynamic rather than fixed. The clock control device continuously monitors supply voltage and adjusts the clock frequency in real-time based on voltage conditions. When voltage drops below a threshold, the frequency is reduced to prevent timing errors; when voltage recovers, frequency is restored to maintain performance. This dynamic adaptation resolves the contradiction between maintaining high productivity and ensuring reliability under varying load conditions.
Solution Approach 2:
A feedback mechanism is implemented where the voltage detecting unit continuously monitors the supply voltage and provides feedback to the clock stretching unit. Based on this feedback, the clock frequency is automatically adjusted: reduced when voltage drops to prevent timing violations, and restored when voltage recovers. This closed-loop feedback system enables the processor to maintain reliability while maximizing productivity under different operating conditions.
2Reliability
If the clock frequency is reduced to prevent timing errors during voltage droop, then reliability is improved, but data processing performance decreases
Solution Approach 1:
The system dynamically adjusts clock frequency based on real-time voltage conditions rather than operating at a fixed frequency. The frequency is temporarily reduced only when voltage droop occurs to maintain timing accuracy, and quickly restored when voltage recovers to preserve data processing performance. This dynamic approach minimizes the impact on productivity while ensuring reliability during critical voltage events.
Solution Approach 2:
The clock frequency modulation occurs periodically based on voltage conditions rather than continuously. The voltage detecting unit monitors supply voltage and triggers frequency adjustment only when voltage thresholds are crossed. This periodic action based on voltage events minimizes performance degradation while maintaining timing accuracy during droop conditions, as the frequency is restored as soon as voltage recovers.
3Reliability
If the processor responds quickly to load changes to maintain voltage stability, then voltage droop is reduced, but the power supply network bandwidth limitation prevents timely response
Solution Approach 1:
Instead of trying to overcome the power supply network bandwidth limitation by increasing current response speed, the invention converts the harmful effect of voltage droop into a useful control signal. The voltage drop itself triggers the clock frequency reduction, which then reduces the load current and allows voltage to recover. This approach uses the voltage droop event to initiate a corrective action that stabilizes voltage without requiring faster power supply response.
Solution Approach 2:
The processor performs self-regulation by monitoring its own supply voltage and automatically adjusting its clock frequency in response to voltage conditions. When voltage droop is detected, the processor autonomously reduces frequency to lower power consumption and reduce the load on the power supply network, allowing voltage to recover without external intervention. This self-service mechanism compensates for the slow power supply response.
Data Source
AI summary
A device for clock control and related products are provided. The device includes a voltage detecting unit and a clock stretching unit. The voltage detecting unit is configured to detect a supply voltage at a target position in the processor, and output a voltage-alarm signal when the supply voltage is lower than or equal to a preset first threshold. The clock stretching unit is connected with the voltage detecting unit and configured to generate a second clock signal according to a first clock signal having a reference frequency in response to reception of the voltage-alarm signal, such that the processor uses the second clock signal to perform data processing. A frequency of the second clock signal is lower than the reference frequency. According to the device for clock control of the disclosure, when a supply voltage of a critical path is lower than a threshold, frequency reduction may be performed on the clock signal, setup time slack of the logic circuit may be increased, and a load of the processor may be reduced, thereby avoiding an error in the data processing result and realizing the control of the voltage droop with load.