Clock Correction Circuit Optimizes Power and Accuracy
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Solution Overview
Problem
Modern communication devices face challenges in balancing power efficiency and communication quality due to strict or loose temperature-based criteria for slow clock correction, leading to increased power consumption or decreased communication quality.
Innovation Solution
A clock correction method and circuit that calculates a clock-period ratio between fast and slow clocks, adjusts this ratio using a compensation value related to the clock-period ratio, cumulative slow clock periods, and time offset, thereby optimizing clock corrections in communication devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If temperature-based correction criterion is set to be strict (e.g., temperature difference greater than 15°C), then communication quality is maintained, but power consumption increases due to frequent corrections
Solution Approach 1:
The patent changes the correction criterion from temperature-based to time-based parameters. Specifically, it uses the cumulative number of slow clock periods and the clock-period ratio as correction parameters, replacing the traditional temperature difference threshold approach. This allows the system to perform corrections based on actual time drift accumulation rather than environmental conditions, reducing unnecessary corrections and power consumption while maintaining communication quality.
Solution Approach 2:
The system uses its own internal clock mechanisms (fast clock and slow clock) to self-correct time drift without relying on external temperature sensors or environmental monitoring. The clock correction circuit autonomously calculates the clock-period ratio and uses the cumulative slow clock periods to determine when correction is needed, making the system self-regulating and reducing power consumption associated with external sensing.
2Use of energy by moving object
If temperature-based correction criterion is set to be loose (e.g., temperature difference greater than 3°C), then power consumption is reduced, but communication quality decreases due to slow clock frequency error
Solution Approach 1:
The patent replaces the thermal/mechanical temperature sensing system with an electronic time-based correction system. Instead of using temperature sensors and thermal fields to trigger corrections, the system uses electronic clock counters and time calculations based on the relationship between fast and slow clocks. This substitution enables more precise control of correction timing, ensuring communication quality is maintained while reducing unnecessary corrections.
Solution Approach 2:
The system implements feedback through the clock correction circuit that continuously monitors the cumulative number of slow clock periods and compares it against the calculated clock-period ratio. This feedback mechanism allows the system to perform corrections only when actual time drift exceeds acceptable thresholds, maintaining communication quality while avoiding unnecessary corrections that would increase power consumption.
3Measurement precision
If slow clock correction is performed frequently to maintain accuracy, then communication quality is maintained, but the system enters active mode frequently increasing power consumption
Solution Approach 1:
The patent implements periodic action by using the cumulative slow clock periods as a counter that accumulates over time. Corrections are performed periodically based on the accumulation of clock periods rather than continuously or based on temperature fluctuations. This periodic correction approach maintains slow clock accuracy while keeping the system in power-saving mode for extended periods, reducing overall power consumption.
4Measurement precision
If the system remains in active mode to perform corrections, then clock accuracy is maintained, but power-saving mode cannot be utilized increasing power consumption
Solution Approach 1:
The patent applies preliminary action by calculating the clock-period ratio between fast and slow clocks in advance, before the system needs to perform corrections. This pre-calculated ratio is then used to determine the cumulative number of slow clock periods that can be accumulated while maintaining acceptable accuracy. This allows the system to stay in power-saving mode longer and perform corrections less frequently, reducing power consumption while maintaining clock accuracy.
Data Source
AI summary
A clock correction method suitable for a communication device comprising a clock correction circuit comprises: in response to the communication device being enabled and entering an active mode, calculating, by the clock correction circuit, a clock-period ratio between a slow clock and a fast clock; in response to the communication device operating in a power-saving mode for a power-saving period, counting at least one rising edge of the slow clock received by the clock correction circuit during the power-saving period, as a cumulative number; in response to the communication device switching to an active mode, calculating the difference between an internal time of the communication device and a reference time of another communication device as a time offset; and in the active mode, adjusting, by the clock correction circuit, the clock-period ratio by using a compensation value related to the clock-period ratio, the cumulative number and the time offset.