Communication System Clock Counter Dispersion for Error Reduction
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Solution Overview
Problem
In factory automation, existing communication systems face challenges in reducing residual error rates due to high occurrence probabilities of specific values in clock counters, which affect the reliability of safety control information transmission.
Innovation Solution
A communication system that includes first and second communication devices, where the clock counters are modified to show dispersed values by replacing overflow values with predetermined values generated at specific timings, using methods like bit shifting or random number generation, to reduce residual error rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a counter is used to count elapsed time, then time measurement is achieved, but the counter shows high occurrence probability of specific values (initial value or values near initial value) which increases residual error rate
Solution Approach 1:
The patent applies dynamics by making the counter value change not only through normal increment but also through randomization at overflow. The counter transitions from a static counting mechanism to a dynamic one that intentionally introduces variability when overflowing, thereby dispersing the occurrence probability distribution of counter values and reducing the residual error rate.
Solution Approach 2:
The patent changes the parameter of counter value generation by introducing randomization at overflow points. Instead of the counter simply wrapping around to the initial value, it becomes a random value within a predetermined range. This parameter change transforms the occurrence probability distribution from concentrated at initial values to dispersed across the full range, directly reducing residual error rate while maintaining time measurement functionality.
2Reliability
If time information is appended to transmitted data for delay detection, then communication reliability is improved, but bit errors in time information increase residual error rate calculation inaccuracy
Solution Approach 1:
The patent extracts the time information from the data transmission process for error detection purposes. By separating time information into a dedicated counter mechanism that is independently managed and randomized at overflow, the system eliminates bit errors in time information while maintaining the ability to detect communication delays through time comparison.
3Measurement precision
If carry counter is incremented when time stamp overflows, then time counting accuracy is maintained, but the carry counter retains initial value or near-initial value with high probability, reducing error detection effectiveness
Solution Approach 1:
The patent applies dynamics to the carry counter by introducing randomization at overflow points. The carry counter transitions from a deterministic increment mechanism to a dynamic one that randomly selects values within a predetermined range when the time stamp overflows. This disperses the occurrence probability distribution of carry counter values, ensuring that initial values or near-initial values do not occur with high probability, thereby improving error detection effectiveness while maintaining time counting accuracy.
Data Source
AI summary
A clock value converter in a CPU replaces a value of a carry counter in a safety clock in the CPU to cause the carry counter to show dispersed values. The CPU transmits a frame including a value of a time stamp and a first error detecting code generated based on the value of the time stamp and the value of the carry counter to a CPU. A clock value converter in the CPU causes, as in the CPU, a carry counter in a safety clock in the CPU to show dispersed values. An error detector in the CPU determines whether a second error detecting code generated based on the value of the received time stamp and a value of the carry counter in the safety clock in the CPU satisfies a condition set for the first error detecting code.