Clock Counter for NVM Start-Up Reliability

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Solution Overview

Problem

Non-volatile memory (NVM) systems may fail to operate properly during start-up due to transient fault conditions or errors, leading to incorrect configuration information being retrieved, which can cause system failures.

Innovation Solution

A clock counter is used to count the number of clock edges of the NVM clock within a predefined time based on a second clock frequency, ensuring the NVM clock operates within a specified parameter range before proceeding with the start-up process, and sending an error signal if the maximum allowed start-up time is exceeded.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the NVM start-up process proceeds without clock verification, then the start-up time is reduced, but the system reliability deteriorates due to transient faults or errors causing incorrect configuration retrieval

Engineering Contradiction:
Improvesystem reliabilityVSAvoidstart-up time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by verifying the NVM clock frequency and operation status before the system proceeds with configuration retrieval during start-up. The counter measures the NVM clock frequency against a reference clock and only allows configuration access when the clock is verified to be operating within specified parameters, preventing transient faults from causing errors while maintaining efficient start-up

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by continuously monitoring the NVM clock frequency using a counter that compares the NVM clock against a reference clock. The system receives feedback about clock operation status and adjusts accordingly - only permitting configuration retrieval when the clock frequency is within acceptable ranges, thus ensuring reliability without excessive delay

Inventive Principle:
Principle #23Feedback

2Measurement precision

If the NVM clock frequency is not verified before configuration retrieval, then the start-up process is faster, but the configuration information may be incorrect due to transient faults

Engineering Contradiction:
Improveclock frequency measurement precisionVSAvoidstart-up procedure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent replaces complex mechanical or hardware-based clock verification mechanisms with a software/firmware counter that measures NVM clock frequency by counting cycles against a reference clock. This substitution achieves precise clock frequency measurement while keeping the overall system complexity manageable through software-based control

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the operational parameters of the NVM clock by verifying that its frequency falls within specified ranges before allowing configuration retrieval. The counter measures the clock frequency and the system adjusts its behavior based on whether the frequency parameter meets required specifications, ensuring accurate measurement without excessive complexity

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9318163B2Robust memory start-up using clock counter
Publication Date: 2016.04.19 NXP USA INC
  • US9318163B2 patent drawing
  • US9318163B2 patent drawing
  • US9318163B2 patent drawing

AI summary

In accordance with at least one embodiment, a clock counter on a system (for example, a system-on-a-chip (SOC) or other system) is utilized to count a number of a clock edges of a memory clock within a predefined time based on a predetermined system clock frequency and, therefore, to determine whether the memory clock for a memory array (for example, a non-volatile memory (NVM) array or other memory array) is correct or not. The system is directed to wait until the count is within an expected range before moving to the next step in a start-up procedure. If the maximum allowed start-up time is exceeded, an error signal is sent to the system such that the application can react to it.