Clock-Cycle Voltage Droop Detection for CPU and GPU Mitigation
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Solution Overview
Problem
Computer circuits such as CPUs and GPUs experience performance issues due to voltage droops caused by large changes in current required from the power delivery network, necessitating effective mitigation strategies.
Innovation Solution
The circuitry detects voltage droop events by receiving a clock signal, obtaining predetermined values and threshold counts, and measuring system voltage. When a measurement value reaches a predetermined value, it initiates a count of clock cycles until the value reaches another predetermined value. If the count is below a threshold, the circuit triggers mitigation actions such as decreasing the clock signal frequency or pausing the clock.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the system operates at high current to improve performance, then productivity is improved, but voltage droop occurs causing reliability to deteriorate
Solution Approach 1:
The droop detection circuitry monitors voltage conditions in advance and triggers mitigation actions before critical voltage droop occurs. The system uses predetermined thresholds and clock cycle counting to detect early signs of voltage droop and proactively adjusts clock frequency or pauses operation to prevent performance degradation and data loss.
2Reliability
If mitigation action is taken to address voltage droop, then reliability is improved, but productivity deteriorates due to reduced clock frequency or paused operation
Solution Approach 1:
The system applies partial mitigation by adjusting clock frequency rather than complete cessation. The droop detection circuitry can trigger frequency reduction as a less severe mitigation action, maintaining some level of processing while addressing voltage instability. This partial action provides a balance between reliability improvement and productivity preservation.
3Reliability
If the system uses complex droop detection and mitigation circuitry, then reliability is improved, but device complexity increases
Solution Approach 1:
The droop detection system is self-contained within the processing device, using internal clock signals and predetermined thresholds stored in registers. The circuitry monitors its own voltage conditions and autonomously triggers mitigation actions without requiring external control systems, reducing overall system complexity while maintaining reliability.
Data Source
AI summary
The present techniques relate to voltage droop detection and there is disclosed circuitry for detecting a voltage droop event, the circuitry configured to: receive a clock signal from a clock distribution network; obtain, from a storage, a first predetermined value, a second predetermined value and a predetermined threshold count; obtain one or more measurement values associated with a system voltage; when a first measurement value of the one or more measurement values reaches the first predetermined value, initiate a count of clock cycles until a subsequent measurement value of the one or more measurement values reaches the second predetermined value, the second predetermined value being different from the first predetermined value; and when the count of clock cycles is lower than the predetermined threshold count, cause a control entity to take mitigation action.