Simultaneous Clock and Data Transmission via Edge Modulation

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Solution Overview

Problem

Existing clock forwarding schemes in data communications require additional bandwidth due to dedicated clock channels, and physical limitations often prevent their use, especially in applications like HDMI and MHL where connector pins or cable wires are limited.

Innovation Solution

Simultaneous transmission of clock and bidirectional data over a single communication channel using signal edge modulation for forward data and Return-to-Zero encoding for backward data, with echo cancellers to prevent jitter and improve signal integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a dedicated clock channel is used for clock forwarding, then clock signal transmission reliability is improved, but bandwidth utilization deteriorates due to additional overhead

Engineering Contradiction:
Improveclock signal transmission reliabilityVSAvoidbandwidth utilization
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent combines the clock channel and data channel into a single shared communication channel. The transmitter encodes both clock signals and data signals onto one channel using signal edge modulation, where the position of signal edges conveys data information while maintaining clock synchronization. This merging eliminates the need for separate dedicated channels for clock and data transmission.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single communication channel is designed to perform multiple functions simultaneously: it carries both clock signals for synchronization and data signals for information transmission. The receiver extracts both the clock signal and data signal from this multi-functional channel, enabling the channel to serve as both a timing reference and a data carrier.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of operation

If a dedicated clock channel is used, then clock signal transmission is simplified, but physical implementation complexity increases due to connector pin or cable wire limitations

Engineering Contradiction:
Improveclock signal transmission simplicityVSAvoidphysical implementation complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

By merging the clock channel and data channel into a single physical communication channel, the patent reduces the number of connector pins and cable wires required. Instead of needing separate physical paths for clock and data signals, the system uses one shared channel that can carry both types of signals through signal edge modulation.

Inventive Principle:
Principle #5Merging (Combining)

3Quantity of substance

If signal edge modulation is used for simultaneous transmission, then bandwidth overhead is reduced, but signal integrity deteriorates due to reflections on the communication channel

Engineering Contradiction:
Improvebandwidth overheadVSAvoidsignal integrity
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent addresses signal reflections, which are typically harmful, by using echo cancellers that process these reflections to improve signal integrity. The echo canceller generates a cancellation signal based on the reflected signal and subtracts it from the received signal, converting the harmful reflection effect into a beneficial signal enhancement that improves overall signal quality.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS9490965B2Simultaneous transmission of clock and bidirectional data over a communication channel
Publication Date: 2016.11.08 LATTICE SEMICON CORP
  • US9490965B2 patent drawing
  • US9490965B2 patent drawing
  • US9490965B2 patent drawing

AI summary

Embodiments of the invention are generally directed to simultaneous transmission of clock and bidirectional data over a communication channel. An embodiment of a transmitting device includes a modulator to generate a modulated signal including a clock signal and a data signal, the clock signal being modulated by a first signal edge of the modulated signal and the data signal being modulated by a position of a second signal edge of the modulated signal; a driver to drive the modulated signal on a communication channel; an echo canceller to subtract reflected signals on the communication channel; and a data recovery module to recover a signal received on the communication channel, the received signal being encoded by Return-to-Zero (RZ) encoding, the signal being received simultaneously with driving the modulated signal on the communication channel.