Clock-Data Recovery Circuit for Nonsymmetrical Eye Patterns
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Solution Overview
Problem
Existing clock-data recovery circuits fail to align the recovered clock with the optimal timing for maximum vertical eye opening in nonsymmetrical eye patterns, leading to suboptimal data sampling.
Innovation Solution
A circuit comprising a variable delay circuit, a two-bit ADC, and a vertical eye monitor circuit that estimates the timing of the vertical eye opening and adjusts the control code to align the recovered clock with the optimal sampling instant, using statistics from two-bit data to maximize the probability of samples being either 0 or 3, thereby optimizing the clock alignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the recovered clock is aligned with the data transition using conventional methods, then the clock recovery is simple, but the sampling timing is suboptimal when the eye pattern is nonsymmetrical
Solution Approach 1:
The patent implements a feedback mechanism where the vertical eye monitor circuit continuously monitors the eye pattern characteristics and feeds back control signals to the variable delay circuit. This closed-loop feedback system adjusts the clock alignment dynamically based on the actual eye pattern measurements, resolving the contradiction by using feedback to achieve precise timing without requiring complex manual adjustment mechanisms.
Solution Approach 2:
The patent changes the parameter of clock phase alignment by using a variable delay circuit that can adjust the timing of the recovered clock relative to the data transitions. By dynamically changing the delay parameter based on eye pattern analysis, the system achieves optimal sampling timing for nonsymmetrical eye patterns while maintaining a relatively simple overall structure.
2Reliability
If the clock alignment is adjusted for nonsymmetrical eye patterns, then data sampling accuracy improves, but the complexity of timing adjustment increases
Solution Approach 1:
The system performs self-service timing adjustment through the vertical eye monitor circuit that automatically analyzes the eye pattern and generates appropriate control signals for the variable delay circuit. This self-adjusting mechanism improves data sampling reliability for nonsymmetrical eye patterns while avoiding the need for external complex timing adjustment equipment or manual calibration procedures.
Solution Approach 2:
The patent replaces complex mechanical or manual timing adjustment mechanisms with an electronic automated system. The vertical eye monitor circuit and variable delay circuit work together to electronically adjust timing parameters based on real-time eye pattern analysis, thereby improving reliability while reducing the complexity of timing adjustment compared to traditional mechanical approaches.
3Productivity
If conventional clock recovery is used, then the circuit structure is simple, but performance deteriorates when the eye pattern is nonsymmetrical
Solution Approach 1:
The patent segments the clock recovery function into distinct modules: a variable delay circuit for timing adjustment, a vertical eye monitor circuit for eye pattern analysis, and a control circuit that coordinates their operation. This segmentation allows each module to perform its specific function efficiently, improving overall clock recovery performance for nonsymmetrical eye patterns while keeping the overall circuit structure manageable through modular design.
Solution Approach 2:
The patent creates a universal clock recovery circuit that can handle both symmetrical and nonsymmetrical eye patterns through the same basic structure. The vertical eye monitor circuit and variable delay circuit work together to adapt the clock alignment to different eye pattern characteristics, providing multi-functional capability that improves productivity across various signal conditions without requiring separate specialized circuits for each case.
Data Source
AI summary
A clock-data recovery circuit includes a variable delay circuit that adjusts timing of a recovered clock by an amount to recover a received data stream at timing corresponding to a maximum opening of an eye pattern of the data stream. The delay timing is adjusted iteratively. The data stream in input to a 2-bit ADC, where the sampled data stream is compared with reference values representative of conditions of the eye pattern, and a result of the comparisons increases or decreases the clock delay according to a relative height of the eye pattern. A method of clock-data recovery uses the recovery circuit.