Clock Data Recovery Apparatus Dynamic Sampling Window Adjustment
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Solution Overview
Problem
Conventional clock data recovery techniques require complex circuit designs and larger areas due to the need for phase shifting, which complicates the regeneration of low jitter clocks and data recovery in high-speed digital transmission systems.
Innovation Solution
A clock data recovery apparatus and method that dynamically adjusts the starting position and length of a sampling window based on the format of the reference data pattern, using a sampling circuit, storage circuit, and determining circuit to adaptively track the phase and waveform of the data signal, eliminating the need for phase shifting circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If phase shifting is used for selecting optimal sampling phase, then clock data recovery performance is improved, but circuit complexity and area increase
Solution Approach 1:
The patent extracts and removes the phase shifting function from the clock data recovery circuit. Instead of using traditional phase shifters, the invention uses a simplified sampling circuit that directly samples the data signal at multiple phases using parallel sampling paths, eliminating the need for complex phase shifting mechanisms while maintaining recovery performance
Solution Approach 2:
The patent segments the sampling process into multiple parallel sampling units, each sampling at different phases simultaneously. This segmentation allows the system to achieve multi-phase sampling capability without requiring sequential phase shifting, thereby reducing circuit complexity while maintaining the ability to select optimal sampling phases
2Reliability
If phase shifting is used for selecting optimal sampling phase, then clock data recovery performance is improved, but circuit area increases
Solution Approach 1:
The patent merges multiple sampling operations into a single clock cycle by using parallel sampling paths that are simultaneously activated. This combining of operations eliminates the need for additional phase shifting circuitry that would otherwise be required to sequentially adjust phases, thereby reducing the overall circuit area while maintaining recovery performance
Solution Approach 2:
The patent removes the phase shifting functionality from the circuit architecture entirely, replacing it with a direct multi-phase sampling approach. This extraction of the phase shifting function eliminates the associated circuit area requirements while preserving the ability to achieve optimal sampling phase selection
Data Source
AI summary
A clock and data recovery apparatus is provided that includes a sampling circuit, a storage circuit and a determining circuit. The sampling circuit includes sampling units each sampling a received data according to one of reference clock signals to generate a sampling result. The storage circuit includes FIFO storage units configured to store the sampling result of the received data corresponding to different time spots. The determining circuit is configured to set a certain number of received data as a reference data pattern, to adjust a starting position of a sampling window according to a transition point of sampled values within the reference data pattern when only one data transition exists therein and adjust a length of the sampling window according to an amount of high state sample points of the sampled values within the reference data pattern when more than one data transitions exist therein.