Clock Synchronization Delay Estimation in Asymmetric Networks
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Solution Overview
Problem
Existing time synchronization methods, such as NTP and PTP, inaccurately calculate one-way delays when the delays are different between upstream and downstream due to non-PTP aware networks, leading to decreased synchronization accuracy, especially in PTP unaware networks.
Innovation Solution
A clock processing device and program that calculates one-way delay differences using temporary delays and estimates consistent delays through a combination of messages, determining valid ranges to ensure accurate synchronization even in PTP unaware networks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the T1-T4 method is used to calculate one-way delay in NTP or PTP, then time synchronization can be performed, but the calculation becomes inaccurate when one-way delays differ between upstream and downstream
Solution Approach 1:
The patent segments the delay measurement into multiple temporary one-way delay calculations (first temporary one-way delay, second temporary one-way delay) using different message combinations. By dividing the overall delay measurement into separate segments and analyzing each independently, the system can identify and compensate for asymmetric delay conditions, improving measurement accuracy in networks with different upstream and downstream delays.
Solution Approach 2:
The patent performs multiple partial delay calculations using different message combinations (T1-T2, T3-T4, and their reverses) rather than relying on a single complete round-trip measurement. By accumulating multiple partial measurements and analyzing their consistency, the system can detect asymmetric delays and select or adjust measurements to achieve more accurate synchronization even when individual measurements are affected by delay asymmetry.
2Adaptability or versatility
If conventional delay calculation methods are used in PTP unaware networks, then communication compatibility is maintained, but synchronization precision deteriorates due to unaccounted delay asymmetry
Solution Approach 1:
The patent introduces an intermediary analysis mechanism that examines the consistency relationships between multiple temporary delay calculations. This intermediary layer detects whether delay asymmetry exists by comparing forward and reverse delay measurements, and when asymmetry is detected, it adjusts the selected delay value or applies compensation. This allows the system to maintain compatibility with PTP unaware networks while improving synchronization precision through intelligent delay selection and adjustment.
3Measurement precision
If multiple temporary one-way delays are calculated to detect asymmetry, then accurate delay measurement can be achieved, but calculation complexity increases
Solution Approach 1:
The patent performs preliminary consistency checks between temporary delay calculations to quickly determine whether delay asymmetry exists. By establishing expected consistency relationships in advance (e.g., T1-T2 should relate to T3-T4 in specific ways) and checking these relationships early, the system can identify asymmetric conditions without performing all possible delay calculations, thereby reducing overall computational complexity while maintaining measurement accuracy.
Data Source
AI summary
In a clock processing device (10), a one-way delay difference calculation unit (26) calculates a first one-way delay difference and a second one-way delay difference. An RTT acquisition unit (28) acquires information to calculate an RTT. A delay estimation unit (32) estimates a first one-way delay. A one-way delay range update unit (30) obtains a first one-way delay difference and a second one-way delay difference, and updates a valid range of the first one-way delay, the valid range being determined by using the first one-way delay difference and the second one-way delay difference. A determination unit (34) determines whether or not the estimated first one-way delay is consistent using the valid range of the first one-way delay.