Clock Signal Delay Circuit for Phase and Duty Synchronization
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Solution Overview
Problem
Semiconductor apparatuses face challenges in maintaining accurate phase and duty ratio synchronization of clock signals due to phase skew and duty ratio distortion, which existing duty correction circuits struggle to address effectively.
Innovation Solution
A signal generation circuit comprising a first and second delay circuit and a duty control circuit, where the duty control circuit compares the phases of output signals and adjusts delay times to minimize phase differences and duty ratios, ensuring synchronization by decreasing delay times uniformly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a general duty correction circuit sets one clock signal as reference and adjusts phase differences of other clock signals, then phase skew and duty ratio distortion are compensated, but the circuit complexity increases and operation speed decreases due to multiple adjustment steps
Solution Approach 1:
The patent extracts the essential function of phase and duty ratio correction by removing unnecessary circuit components. Instead of using a complex reference-based adjustment circuit, it employs a simplified delay circuit that directly generates corrected clock signals with minimal components, achieving the same synchronization accuracy without the complexity of multiple adjustment steps
Solution Approach 2:
The patent segments the clock signal correction function into independent delay circuits for each clock signal path. Each delay circuit operates autonomously to adjust its respective clock signal's phase and duty ratio, eliminating the need for a centralized reference signal and complex coordination circuits
2Adaptability or versatility
If delay times are increased to accommodate phase adjustment ranges, then phase skew compensation capability is improved, but the minimum operation speed of the circuit decreases
Solution Approach 1:
The patent implements dynamic delay adjustment by making the delay time variable rather than fixed. The delay circuits can adaptively change their delay parameters based on the actual phase skew conditions, allowing the system to use minimal delay times for correction while maintaining the capability to handle various phase adjustment requirements
Solution Approach 2:
The patent changes the delay time parameter to be variable and controllable, enabling the circuit to optimize its operation speed by using the minimum necessary delay time for phase correction. This allows the circuit to maintain a wide phase adjustment range while operating at maximum speed by adjusting the delay parameter dynamically
Data Source
AI summary
A signal generation circuit includes a first delay circuit, a second delay circuit, and a duty control circuit. The first delay circuit delays a first input signal to generate a first output signal. The second delay circuit delays a second input signal to generate a second output signal. The duty control circuit compares phases of the first and second output signals and changes the value of the second delay control signal, and then decreases the times, by which the first and second input signals are delayed, by the same value.