Network Clock Delay Adjustment Using Frequency Estimation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing clock synchronization technologies, such as GPS and Precision Time Protocol (PTP), face challenges with unreliable network clocks, time offsets, and short-term errors, which can lead to low-frequency drift and instability in clock signals, particularly when GPS signals are unavailable or of poor quality.

Innovation Solution

A clock product that generates frequency metrics for network clock signals using a local reference clock, estimates network delay, and updates frequency metrics to produce a stable output clock signal, even in the absence of a reliable input clock, by employing a cascaded phase-locked loop architecture with holdover control and frequency estimation techniques to select the best available clock signal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If GPS clock signal is used for synchronization, then clock accuracy is improved, but reliability deteriorates when GPS signals are unavailable or erroneous

Engineering Contradiction:
Improveclock accuracyVSAvoidsignal availability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The system performs preliminary frequency estimation and validation of the GPS clock signal before using it for synchronization. The frequency estimator continuously monitors the GPS signal quality and predicts potential failures, allowing the system to switch to backup sources or holdover mode before complete signal loss occurs, thus maintaining reliability while preserving accuracy when available.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

A local reference clock signal acts as an intermediary between the GPS clock signal and the output clock signal. The frequency estimator compares the GPS signal against this local reference, and only uses GPS-derived timing when the estimation confirms it meets quality thresholds. This intermediary approach allows the system to benefit from GPS accuracy when available while maintaining reliability through the local reference backup.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If network clock signals are used for synchronization, then adaptability is improved, but stability deteriorates due to network delay variations and clock drift

Engineering Contradiction:
Improvenetwork compatibilityVSAvoidclock signal stability
Core Design Contradiction:
Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The frequency estimator provides continuous feedback about the quality and stability of received network clock signals. By monitoring frequency metrics and comparing them against expected values, the system can detect drift and delay variations in real-time, adjusting or rejecting network clock inputs accordingly to maintain overall signal stability while preserving network adaptability.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system replaces direct reliance on potentially unstable network clock signals with a mathematically-based frequency estimation approach. Instead of mechanically trusting the incoming network clock, the system uses algorithms to estimate and validate frequencies, substituting computational verification for direct signal acceptance, thereby improving stability without sacrificing network compatibility.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Reliability

If holdover mode is activated when input clock signal is invalid, then reliability is improved, but manufacturing precision deteriorates due to increased complexity

Engineering Contradiction:
Improveclock continuityVSAvoidcontrol circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The frequency estimator serves multiple functions: it validates incoming clock signals, estimates frequency for synchronization decisions, and triggers holdover mode activation. This multi-functional component reduces the need for separate validation circuits and control logic, maintaining reliability through comprehensive monitoring while minimizing the increase in device complexity by consolidating functions into a single estimation engine.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10608647B1Delay adjustment using frequency estimation
Publication Date: 2020.03.31 SKYWORKS SOLUTIONS INC
  • US10608647B1 patent drawing
  • US10608647B1 patent drawing
  • US10608647B1 patent drawing

AI summary

A method includes generating first frequency metrics for a first received network clock signal using a local reference clock signal. The method includes, in response to the first received network clock signal being available and satisfying a quality metric, generating a network delay estimate using a first error estimate based on the first received network clock signal, and updating stored frequency metrics for the first received network clock signal with the first frequency metrics. The method includes generating an output clock signal based on received packets and the network delay estimate. The first frequency metrics for the first received network clock signal may include a current average frequency count, a prior average frequency count, a standard deviation of prior average frequency counts and a multiplicative constant corresponding to a number of samples used to determine the current average frequency count, prior average frequency count, and standard deviation.