Clock Path Delay Compensation for Power Supply Timing Drift
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Solution Overview
Problem
Timing variations in clock signals within memory devices due to power supply sensitivities cause operational issues, as different components of the clock path respond differently to voltage and current variations, leading to phase drift and synchronization problems.
Innovation Solution
A delay compensation circuit that adjusts the timing of clock signals based on phase differences detected between forward and feedback clock paths, using switch circuits and timing circuits with predictable delay power supply sensitivities to compensate for variations in power supply, ensuring the clock signals remain in phase.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If delay circuits are added to the clock path for timing adjustment, then clock signal timing flexibility is improved, but timing variation due to power supply sensitivity increases
Solution Approach 1:
The patent implements a feedback mechanism where the delay compensation circuit continuously monitors the phase difference between forward and feedback clock paths and dynamically adjusts the delay of adjustable delay circuits to compensate for power supply-induced timing variations, thereby maintaining timing stability while preserving timing flexibility
Solution Approach 2:
The patent changes the delay parameter of adjustable delay circuits based on detected phase differences, dynamically adjusting the delay value to compensate for power supply variations and maintain synchronized clock signals across different operating conditions
2Adaptability or versatility
If multiple delay circuits are used in the clock path, then timing adjustment capability is improved, but the cumulative timing variation from power supply sensitivity worsens
Solution Approach 1:
The feedback clock path and phase detection mechanism monitor the cumulative timing variations introduced by multiple delay circuits and feed this information back to the delay compensation circuit, which then adjusts the delay parameters to cancel out the harmful cumulative variations while preserving the desired timing adjustment capability
Solution Approach 2:
The delay compensation circuit acts as an intermediary that processes the phase difference information and generates compensatory delay adjustments, mediating between the multiple delay circuits and the final clock output to eliminate cumulative timing variations
3Measurement precision
If delay compensation circuit is implemented to correct timing variations, then timing accuracy is improved, but device complexity increases
Solution Approach 1:
The delay compensation circuit is designed to perform multiple functions: it detects phase differences, calculates required compensation, and adjusts delay parameters, thereby achieving high timing accuracy without requiring separate dedicated circuits for each function, thus limiting the increase in device complexity
Data Source
AI summary
Apparatuses and methods for compensating for differing power supply sensitivities of a circuit in a clock path. One such method includes altering signal timing of at least one of reference and feedback clock signals differently according to variations in power supply voltage to compensate for differences in delay power supply sensitivities of delays of a forward clock path and of a feedback clock path. Another example method includes providing an output clock signal in phase with an input clock signal and compensating for delay error between delays used in providing at least some of the delay of the output clock signal relative to the input clock signal by providing delays having power supply sensitivities resulting in a combined power supply sensitivity that is inverse to the delay error.