Clock Desynchronization Quantification in Active Implants
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Solution Overview
Problem
Active implantable medical devices with autonomous capsules, such as leadless cardiac devices, face challenges in synchronizing clocks and managing energy-efficient communication due to high transmission power requirements and desynchronization issues, especially with low-frequency clocks and energy constraints.
Innovation Solution
A method for quantifying desynchronization between two clocks in active implantable medical devices using a fast clock to calculate the time shift, allowing for synchronization without requiring clock adjustments, and selectively activating fast clocks to minimize energy consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If low-frequency clocks are used in autonomous capsules to reduce energy consumption, then energy efficiency is improved, but clock synchronization precision deteriorates due to lower temporal resolution
Solution Approach 1:
The patent divides the clock system into two segments: a low-frequency clock for general operation and a high-frequency clock for precise timing measurements. The low-frequency clock maintains energy efficiency while the high-frequency clock provides the necessary temporal resolution for synchronization, resolving the contradiction between energy consumption and measurement precision.
Solution Approach 2:
The system dynamically switches between low-frequency and high-frequency clocks based on operational requirements. The high-frequency clock is activated only when precise timing measurements are needed for synchronization, and deactivated otherwise to maintain energy efficiency, making the system adaptable to different operational states.
2Adaptability or versatility
If independent clocks are used in each autonomous device, then device autonomy is improved, but synchronization between devices deteriorates due to frequency differences
Solution Approach 1:
The patent implements a feedback mechanism where devices exchange timing information and calculate desynchronization levels. Based on this feedback, each device adjusts its timing calculations to compensate for frequency differences, maintaining synchronization reliability while preserving device autonomy with independent clocks.
Solution Approach 2:
The system changes the parameter of clock frequency dynamically by switching between low-frequency and high-frequency modes. During synchronization measurements, the high-frequency mode is activated to improve timing precision, while the low-frequency mode is used during normal operation to maintain autonomy and save energy.
3Measurement precision
If fast clocks are continuously activated for precise timing measurements, then measurement precision is improved, but energy consumption increases
Solution Approach 1:
The high-frequency clock is activated periodically only when timing measurements are required, such as during synchronization events or data transmission/reception windows. Between these periodic activations, the low-frequency clock maintains operation, significantly reducing overall energy consumption while preserving measurement precision when needed.
Solution Approach 2:
The system dynamically adjusts clock frequency based on operational state, switching to high-frequency mode during critical timing operations and returning to low-frequency mode during idle periods. This dynamic adaptation ensures measurement precision is maintained only when necessary, optimizing energy consumption.
Data Source
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AI summary
The devices are clocked by continuously operating slow clocks (CLK1/32k, CLK2/32k) and also include selectively activated fast clocks (CLK1/10M, CLK2/10M). The method comprises: a) on a predetermined transition (T1) of the second slow clock, transmission by the second device of a synchronization request signal (SYNC); b) counting the pulses of the first and/or second fast clock until a predetermined transition (T3) of the first slow clock is detected; then c) transmission by the first device to the second device of a response signal (D1); and d) by the second device, upon receiving the response signal, calculation of the time offset (OFFSET) based on the result (D1, D2) of the pulse count of the first fast clock and/or second fast clock.