Clock Detector Circuit for EMI-Resilient Frequency Error Sensing
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Solution Overview
Problem
As digital systems and semiconductor devices increase in operational speed, they face challenges with Electro-Magnetic Interference (EMI), which can cause malfunctions, especially in sensitive automotive electronic components, necessitating effective monitoring and error detection mechanisms.
Innovation Solution
A semiconductor device and system that generate a reference voltage based on input or output clock frequencies, using a clock generator, divider circuit, sample-and-hold circuit, and voltage regulator to detect frequency, oscillation, and jitter errors, outputting error signals to ensure operational stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the operational speed of digital systems and PLL is increased, then the system performance and integration level are improved, but Electro-Magnetic Interference (EMI) occurs causing malfunctions in peripheral circuits
Solution Approach 1:
The patent implements a feedback mechanism by generating an error signal that compares the output clock frequency with a reference frequency. This feedback loop enables real-time monitoring and correction of frequency deviations caused by EMI, allowing the system to maintain stable operation despite high-speed induced interference. The error signal feeds back to adjust the PLL operation, compensating for EMI effects dynamically.
Solution Approach 2:
The patent introduces an intermediary error detection mechanism that acts as a mediator between the high-speed clock generator and the affected peripheral circuits. By inserting this error detection layer, the system can identify EMI-induced frequency deviations before they cause critical malfunctions, allowing for corrective action without directly exposing the entire system to the harmful effects of high-speed operation.
2Reliability
If error detection mechanisms are added to monitor PLL operation, then system reliability is improved, but device complexity increases
Solution Approach 1:
The error detection mechanism is designed with multi-functionality to reduce overall device complexity. The same error detection circuitry is used to monitor both frequency accuracy and EMI effects, eliminating the need for separate dedicated circuits for each function. This universal approach maintains high reliability while minimizing the increase in device complexity by making components serve multiple purposes.
Solution Approach 2:
The system implements self-service through automatic error detection and correction without requiring external monitoring equipment or complex control systems. The error signal is generated and processed within the device itself, enabling the system to self-diagnose and self-correct frequency deviations caused by EMI, thereby maintaining reliability without adding significant external complexity.
Data Source
AI summary
A semiconductor device includes a clock generator which receives an input clock and generates an output clock, a reference voltage generator which receives the input clock or the output clock, generates a sub-reference voltage in accordance with a frequency of the input clock or a frequency of the output clock, and generates a reference voltage using the sub-reference voltage and a preset error voltage, and a clock detector which receives the output clock, generates a first output voltage in accordance with the output clock, and compares the generated first output voltage with the reference voltage to output an error signal based on the output clock, wherein the preset error voltage is set in accordance with a degree of preset error of the output clock.