In-Situ Clock Diagnostics via Management Bus Integration
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Solution Overview
Problem
Information handling systems face complex and costly diagnostics challenges, particularly in identifying clock-related failures, due to their increasing hardware complexity and reliance on external probes and fixtures, which often lead to unnecessary system returns and high warranty costs.
Innovation Solution
A clock diagnostics module integrated into the clock controller interfaces with a management bus to enable in-situ diagnosis of clock domains, allowing system-level access and diagnosis of clock signals without external tools, using a management processor to communicate with the module through SMBus for independent system operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external probes and fixtures are used for clock diagnostics, then measurement precision is improved, but device complexity and ease of operation worsen due to requiring external tools and system disassembly
Solution Approach 1:
The patent introduces an intermediary diagnostic interface circuit integrated within the clock controller that mediates between the clock signal source and external diagnostic equipment. This intermediary contains test mode logic that can generate test clock signals and measure clock parameters without requiring external probes to directly access internal clock circuits, thereby maintaining measurement precision while improving ease of operation through insitu capability
Solution Approach 2:
The patent replaces the mechanical probe-based diagnostic system with an electronic/software-based diagnostic interface integrated into the clock controller. The test mode logic and diagnostic registers provide electronic access to clock signal characteristics, eliminating the need for physical external probes and fixtures, thus enabling insitu diagnostics without compromising measurement accuracy
2Measurement precision
If JTAG standard with independent clock source is used, then measurement precision is improved, but manufacturing cost increases
Solution Approach 1:
The patent makes the clock controller multi-functional by integrating diagnostic capabilities directly into the clock controller logic. The same clock controller that generates and distributes clock signals also performs self-diagnostics through integrated test mode logic, eliminating the need for separate JTAG-based diagnostic systems with independent clock sources, thereby reducing manufacturing cost while maintaining measurement precision
Solution Approach 2:
The patent merges the clock control function and diagnostic function into a single integrated clock controller unit. The diagnostic interface shares the same hardware resources and logic with the clock generation function, combining multiple functions into one component, which reduces overall system cost compared to using separate JTAG equipment with independent clock sources
3Ease of manufacture
If counter with flip/flop is used for clock counting, then ease of manufacture is improved, but measurement precision worsens due to narrow view of clock operations
Solution Approach 1:
The patent segments the clock diagnostic function into multiple independent test modes within the clock controller logic, including clock signal presence detection, frequency measurement, rise/fall time measurement, and duty cycle measurement. Each segment handles a specific aspect of clock characterization, providing comprehensive measurement precision while maintaining ease of manufacture through modular logic design that builds upon simple counter foundations
4Measurement precision
If phase lock is used for clock tracking, then measurement precision is improved, but ease of operation worsens due to limited scope in testing clock data usage
Solution Approach 1:
The patent creates a universal diagnostic interface that can operate in multiple test modes beyond just phase-locked tracking. The diagnostic logic can measure clock presence, frequency, rise/fall times, duty cycle, and can test multiple clock domains independently, making the system adaptable to various diagnostic needs while maintaining the precision benefits of phase-tracking when required
Data Source
AI summary
A clock diagnostics module, such as a state machine, integrated into an integrated clock controller monitors clock signals associated with the integrated clock controller and reports the status of the clock signals through a management bus, such as an SMBus. For instance, a counter integrated into the integrated clock controller counts clock signal cycles that occur in a management bus cycle and compares the clock signal with an expected value to determine the accuracy of the clock. A power on reset allows the management bus to read the clock diagnostics module in the event of clock controller failure.