Clock-Discharged Shift Register for Compact LCD Scan Driving

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Solution Overview

Problem

Conventional shift registers for liquid crystal display (LCD) devices face issues with high load on the discharging voltage source line, leading to potential malfunction and increased size, which limits their integration in the liquid crystal panel.

Innovation Solution

The proposed shift register design reduces the load on the discharging voltage source by using clock pulses to discharge nodes instead of a dedicated discharging voltage source, and optimizes the number of nodes and switching devices, allowing for a more compact structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a dedicated discharging voltage source is used to maintain nodes in discharging state, then the node discharge function is reliable, but the load on the discharging voltage source line increases and may cause malfunction

Engineering Contradiction:
Improvenode discharge reliabilityVSAvoidload on discharging voltage source line
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent extracts the discharging voltage source from the traditional constant voltage supply and replaces it with clock pulse signals. The clock pulses are taken from the existing clock transmission lines and used to control the discharge of nodes through switching devices, eliminating the need for a dedicated discharging voltage source line and reducing the load on power supply lines.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The clock pulses, which originally served only for timing and signal synchronization, are given a dual function by using them to control the discharge of nodes. The same clock transmission lines that provide timing signals now also provide the discharge control signals, making the clock signal universal for both timing and voltage control purposes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of operation

If at least two nodes and multiple switching devices are used to control node states, then the shift register function is complete, but the device size increases

Engineering Contradiction:
Improvenode control capabilityVSAvoidnumber of nodes and switching devices
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent merges the functions of multiple nodes into a single node structure. By using the clock pulse signals to directly control the discharge of the node, the patent eliminates the need for separate nodes and reduces the number of switching devices required, thereby simplifying the overall device structure while maintaining the shift register functionality.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

Instead of using multiple nodes to achieve node control capability, the patent inverts the approach by using a single node controlled by clock pulse signals. The control mechanism is inverted from active high-state control to active low-state discharge control, reducing the complexity of the node structure.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS8265222B2Shift register
Publication Date: 2012.09.11 LG DISPLAY CO LTD
  • US8265222B2 patent drawing
  • US8265222B2 patent drawing
  • US8265222B2 patent drawing

AI summary

A shift register is disclosed, which can prevent malfunctioning of device by decreasing the load on a discharging voltage source line, and can decrease a size of stage. The shift register comprises a plurality of stages to sequentially output scan pulses through respective output terminals, wherein each of the stages comprises a pull-up switching unit controlled based on a signal state of node, and connected between the output terminal and any one among a plurality of clock transmission lines to transmit the clock pulses provided with sequential phase differences; and a node controller to control the signal state of node, and to discharge the node by using the clock pulse from any one among the plurality of clock transmission line.