Clock Distribution Layout for 24-Channel Bonding
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Solution Overview
Problem
High-speed data transmission protocols, such as Interlaken, face challenges in supporting a large number of channels due to limited channel bonding capabilities in integrated circuits, as existing designs can only support a limited number of channels without additional clock signal sources, restricting the ability to utilize all channels for data transmission and reception.
Innovation Solution
A dedicated clock line is introduced to route clock signals from a periphery area to channel areas, allowing CMU channels to function as regular channels, thereby enabling 24 channel bonding on each side of the device without requiring additional clock signal sources, and using bi-directional buffers to isolate and segment clock lines for flexible clock signal distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If additional clock signal sources are added to support more channels, then channel bonding capability is improved, but device complexity increases
Solution Approach 1:
The patent makes existing CMU channels multi-functional by allowing them to operate as regular data channels while still being capable of generating clock signals when needed. This eliminates the need for dedicated clock signal sources, as the same channels can serve dual purposes depending on configuration, thereby supporting 24-channel bonding without adding extra clock sources or complexity.
2Device complexity
If clock lines are shared across multiple channels, then device complexity is reduced, but signal integrity deteriorates due to noise and jitter
Solution Approach 1:
The patent segments the clock distribution system by providing dedicated clock lines for different channel groups (e.g., first set of channels receives clock from first CMU channel, second set receives from second CMU channel). This segmentation isolates clock signals from each other and from data transmission noise, maintaining signal integrity while still utilizing existing channel infrastructure without requiring a completely separate dedicated clock source for each channel.
3Productivity
If all channels are used for data transmission, then productivity is improved, but clock signal distribution becomes insufficient
Solution Approach 1:
The patent implements self-service by enabling CMU channels to generate their own clock signals autonomously. Each CMU channel can independently produce clock signals that are then distributed to other channels, eliminating the need for external dedicated clock sources. This allows all channels to be utilized for data transmission while the system self-provides the necessary clock signals through its own channel infrastructure.
Data Source
AI summary
A circuit includes a first area, a second area, and a third area. The second area includes a locked loop circuit that generates a clock signal. The locked loop circuit receives a supply voltage that is isolated from noise generated in the first area. The third area includes multiple quads of channels and a clock line coupled to route at least one clock signal generated in the second area to the channels in each of the quads. The third area is separate from the second area in the circuit.