Clock Distribution Network Using Current-Mode Transmission
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Solution Overview
Problem
High-speed clock transmission over long distances suffers from significant insertion loss due to the increasing frequency of the signal, making it challenging to distribute a high-speed clock effectively to physically separated synchronous digital circuits without signal weakening.
Innovation Solution
A clock distribution network utilizing a cascade of components including a voltage-to-current driver, transmission line, current buffer, LC tank, capacitively driven wires, and inverter buffers to convert and amplify the signal, employing both current-mode and voltage-mode transmission schemes to minimize insertion loss and maintain signal strength.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If voltage-mode transmission is used for long-distance clock distribution, then the transmission distance can be extended, but the insertion loss increases significantly causing signal weakening
Solution Approach 1:
The patent introduces a current-mode transmission stage as an intermediary between the voltage source and the distant load. The voltage-to-current converter transforms the voltage signal into a current signal that is transmitted through the transmission line, where it experiences less attenuation. The current buffer then converts it back to voltage at the receiving end, effectively mediating the transmission process to overcome the distance-loss contradiction.
Solution Approach 2:
The patent changes the transmission parameter from voltage-mode to current-mode for the long-distance segment. By converting the signal representation from voltage to current during transmission, and then back to voltage at the receiver, the system exploits the different attenuation characteristics of current signals in transmission lines to reduce insertion loss over long distances.
2Speed
If high-speed clock frequency is increased to improve timing precision, then the clock speed increases, but the insertion loss increases due to frequency dependence
Solution Approach 1:
The current-mode transmission stage acts as a mediator that compensates for the frequency-dependent losses. Current signals in transmission lines exhibit different loss characteristics compared to voltage signals, particularly at high frequencies. The voltage-to-current converter and current buffer enable the system to transmit high-frequency clock signals with reduced insertion loss by exploiting the favorable frequency response of current-mode transmission.
3Loss of energy
If voltage-to-current conversion and current buffer stages are added to reduce insertion loss, then the signal strength is maintained, but the device complexity increases
Solution Approach 1:
The patent segments the clock distribution system into distinct functional stages: a voltage-to-current converter stage, a current-mode transmission line stage, and a current buffer stage. Each segment is optimized for its specific function, allowing the system to achieve low insertion loss in the transmission segment while keeping other segments relatively simple. This segmentation enables modular design and optimization.
Solution Approach 2:
The current buffer serves multiple functions: it converts current back to voltage, provides impedance matching, buffers the signal to drive subsequent logic circuits, and maintains signal integrity. By making this component multi-functional, the patent reduces the need for additional separate components, thereby limiting the increase in overall device complexity.
Data Source
AI summary
A clock distribution network includes receiving a remote voltage signal; transmitting the remote voltage signal into a local voltage signal using a current-mode transmission scheme that comprises a cascade of a voltage-to-current driver, a transmission line, a current buffer, and a LC (inductor-capacitor) tank; transmitting the local voltage signal into a first destination voltage signal using a voltage-mode transmission scheme that comprises a cascade of a first capacitively driven wire and a first inverter buffer; and transmitting the local voltage signal into a second destination voltage signal using a voltage-mode transmission scheme that comprises a cascade of a second capacitively driven wire and a second inverter buffer.