Clock Distribution Circuit Phase Control for EMI Reduction

Solution Overview

Problem

In semiconductor integrated circuits, the increasing number of switching regulators in power management integrated circuits (PMICs) leads to increased electromagnetic interference (EMI) and input capacitance, degrading system performance and increasing costs, particularly when all regulators simultaneously supply power.

Innovation Solution

A clock distribution circuit with a phase locked loop, phase detecting and converting circuits, and a clock generating and compensating circuit is used to detect and adjust phase differences between reference and power switching signals, ensuring efficient switching times and reducing simultaneous power supply situations, thereby minimizing EMI and input capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the number of switching regulators in PMIC is increased to supply power to more components, then the power supply capability is improved, but electromagnetic interference (EMI) and input capacitance increase, degrading system performance

Engineering Contradiction:

Improvepower supply capabilityVSAvoidelectromagnetic interference (EMI)

Core Design Contradiction:

Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent implements phase-shifted periodic switching actions among multiple switching regulators. Each regulator operates at the same frequency but with different phase angles (e.g., 0°, 120°, 240° for three regulators), creating a distributed switching pattern that spreads electromagnetic interference over time and reduces peak EMI levels while maintaining high power supply capability

Inventive Principle:

Principle #19Periodic action

Solution Approach 2:

The control circuit pre-calculates and pre-establishes optimal phase shifts and switching schedules for multiple regulators before operation begins. This preliminary configuration ensures that regulators are activated in a sequence that minimizes EMI and input capacitance requirements from the start, preventing harmful effects rather than reacting to them

Inventive Principle:

Principle #10Preliminary action

2Power

If multiple switching regulators operate simultaneously to increase power supply capability, then the power delivery is improved, but electromagnetic interference (EMI) and input capacitance increase, degrading system performance

Engineering Contradiction:

Improvepower deliveryVSAvoidelectromagnetic interference (EMI)

Core Design Contradiction:

PowerVSObject-affected harmful factors

Solution Approach 1:

The patent implements phase-shifted periodic switching actions among multiple switching regulators. Each regulator operates at the same frequency but with different phase angles (e.g., 0°, 120°, 240° for three regulators), creating a distributed switching pattern that spreads electromagnetic interference over time and reduces peak EMI levels while maintaining high power supply capability

Inventive Principle:

Principle #19Periodic action

Solution Approach 2:

The control circuit pre-calculates and pre-establishes optimal phase shifts and switching schedules for multiple regulators before operation begins. This preliminary configuration ensures that regulators are activated in a sequence that minimizes EMI and input capacitance requirements from the start, preventing harmful effects rather than reacting to them

Inventive Principle:

Principle #10Preliminary action

3Power

If all switching regulators supply power at the same time to improve power delivery, then the power availability is improved, but the characteristics of PMIC are degraded due to instantaneous large changes in voltage and current

Engineering Contradiction:

Improvepower availabilityVSAvoidPMIC characteristics

Core Design Contradiction:

PowerVSReliability

Solution Approach 1:

The patent implements phase-shifted periodic switching actions among multiple switching regulators. Each regulator operates at the same frequency but with different phase angles (e.g., 0°, 120°, 240° for three regulators), creating a distributed switching pattern that spreads electromagnetic interference over time and reduces peak EMI levels while maintaining high power supply capability

Inventive Principle:

Principle #19Periodic action

Solution Approach 2:

The control circuit pre-calculates and pre-establishes optimal phase shifts and switching schedules for multiple regulators before operation begins. This preliminary configuration ensures that regulators are activated in a sequence that minimizes EMI and input capacitance requirements from the start, preventing harmful effects rather than reacting to them

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS11082050B2Clock distribution circuit using adjustable phase control and voltage converter including the same

Publication Date: 2021.08.03 SAMSUNG ELECTRONICS CO LTD

AI summary

A clock distribution circuit including a Phase Locked Loop (PLL), a first Phase Detecting and Converting (PDC) circuit, a second PDC circuit, and a clock generating and compensating (CGC) circuit may be provided. The PLL may generate reference clock signals. The first PDC circuit may generate input phase difference voltages based on phase differences between respective pairs of two reference clock signals among the reference clock signals. The second PDC circuit may generate output phase difference voltages based on phase differences between respective pairs of two power switching signals among power switching signals received from external switching regulators. The CGC circuit may generate input clock signals provided to the plurality of external switching regulators by shifting phases of the reference clock signals, and additionally control a phase of at least one of the input clock signals based on the input phase difference voltages and the output phase difference voltages.