Clock Dithering for Capacitive Receiver EMI Mitigation

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Solution Overview

Problem

Continuous-time receivers for capacitive sensing generate high electromagnetic emissions (EMI) due to continuous operation at high clock rates, which can degrade interference mitigation and signal-to-noise ratio (SNR) performance, especially when clock-dithering is applied.

Innovation Solution

Implementing clock-dithering at burst or sensing half-period boundaries and adjusting the demodulation frequency configuration to maintain a constant sensing frequency, thereby reducing EMI while preserving SNR performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If continuous-time receiver operates at high clock rates, then sensing speed and response time are improved, but electromagnetic emissions increase and signal-to-noise ratio deteriorates

Engineering Contradiction:
Improvesensing speedVSAvoidelectromagnetic emissions
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The patent applies periodic clock-dithering at burst or sensing half-period boundaries to modulate the clock signal frequency periodically. This spreads the electromagnetic emissions across a broader frequency spectrum, reducing peak EMI levels while maintaining the high-speed sensing capability through continuous operation.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent dynamically adjusts the demodulation frequency configuration in response to clock-dithering changes. By changing the demodulation frequency parameter to track the dithered clock frequency, the system maintains constant sensing frequency and preserves signal-to-noise ratio while operating at high clock rates.

Inventive Principle:
Principle #35Parameter changes

2Object-generated harmful factors

If clock-dithering is applied to reduce electromagnetic emissions, then EMI is reduced, but sensing frequency stability deteriorates and signal-to-noise ratio performance degrades

Engineering Contradiction:
Improveelectromagnetic emissionsVSAvoidsensing frequency stability
Core Design Contradiction:
Object-generated harmful factorsVSMeasurement precision

Solution Approach 1:

The patent implements a feedback mechanism where the demodulation frequency is continuously adjusted based on the dithered clock signal frequency. This closed-loop control ensures that the sensing frequency remains constant despite clock-dithering, maintaining measurement precision while achieving EMI reduction.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent makes the demodulation frequency dynamic by adjusting it in real-time to compensate for clock-dithering variations. This dynamic adjustment maintains sensing frequency stability throughout the dithering cycle, preserving signal-to-noise ratio performance while enabling EMI mitigation.

Inventive Principle:
Principle #15Dynamics

3Object-generated harmful factors

If sensing frequency is varied to mitigate interference, then interference reduction is achieved, but measurement consistency worsens

Engineering Contradiction:
ImproveinterferenceVSAvoidsensing frequency consistency
Core Design Contradiction:
Object-generated harmful factorsVSStability of the object's composition

Solution Approach 1:

The patent uses periodic clock-dithering at defined boundaries (burst or half-period) rather than continuous frequency variation. This periodic approach allows the sensing frequency to return to its original value in each cycle, maintaining measurement consistency while still achieving interference mitigation through frequency spreading.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent changes the demodulation frequency parameter in sync with the clock-dithering pattern, ensuring that the effective sensing frequency remains constant. This coordinated parameter change maintains measurement consistency while the actual clock frequency varies to mitigate interference.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10175824B2Interference mitigation and clock dithering for a continuous-time receiver for capacitive sensing
Publication Date: 2019.01.08 SYNAPTICS INC
  • US10175824B2 patent drawing
  • US10175824B2 patent drawing
  • US10175824B2 patent drawing

AI summary

Embodiments herein describe input devices that include receivers for sampling capacitive sensing signals that perform continuous-time demodulation. An input device is provided that includes a plurality of sensor electrodes in a sensing region of the input device and a processing system coupled to the plurality of sensor electrodes and configured to generate a first measurement of a capacitive sensing signal acquired using a first sensor electrode of the plurality of sensor electrodes during a first time period, that comprises effects of a first modulated signal driven onto at least one of the plurality of sensor electrodes, the first measurement generated at a first sensing frequency based on a clock signal; periodically dither the clock signal; and adjust a demodulation frequency based on the dithered clock signal to generate a second measurement of the capacitive sensing signal during a second time period at the first sensing frequency based on the dithered clock signal.