Clock Domain Delay Monitoring via Constant Phase Shift
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Solution Overview
Problem
In multi-platform systems with multiple clock domains, maintaining accurate time synchronization becomes challenging due to varying clock domain transitions and phase relationships, requiring a method to dynamically determine delays without complex calibrations or clock synchronization methodologies.
Innovation Solution
A system and method that generate a phase-shifted secondary clock equal in frequency to the secondary clock domain, using a calibration signal to find a zero state where values differ, aligning a counter to calculate the current offset between clock edges, and adjusting to maintain alignment, allowing for precise synchronization across clock domains.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If complex clock synchronization methodologies are used to maintain accurate time relationships, then time synchronization precision is improved, but device complexity increases
Solution Approach 1:
The patent changes the parameter of clock phase relationship by generating a phase-shifted version of the secondary clock (e.g., 90-degree phase shift). This allows the system to dynamically adapt to varying phase relationships between clock domains by capturing calibration signals at different phases, thereby achieving accurate delay measurement without complex external synchronization hardware
Solution Approach 2:
The system performs self-calibration by using its own internal clocking resources to generate the phase-shifted secondary clock and automatically capturing calibration signals from the calibration source. The delay measurement is derived from the system's own operation rather than requiring external reference or complex synchronization methodologies
2Measurement precision
If time consuming calibrations are performed to determine clock domain delays, then measurement precision is improved, but productivity decreases
Solution Approach 1:
The system performs delay calibration in advance during system initialization or setup phase. The measured delay values are stored and reused for subsequent operations, eliminating the need for repeated time-consuming calibrations. The phase-shifted clock approach enables this preliminary calibration to be completed quickly and accurately
Solution Approach 2:
The calibration process is performed periodically or at predetermined intervals rather than continuously. The system can detect when recalibration is needed based on system state changes, and the phase-shifted clock mechanism enables rapid periodic calibration when necessary, balancing measurement accuracy with operational efficiency
Data Source
AI summary
A system and a method. The system may include a computing device configured for monitoring delay across clock domains using a constant phase shift. The computing device may be further configured to: use a counter value, a known clock period of a primary clock domain, and a known clock period of a secondary clock domain to calculate a current offset between a last rising edge of a primary clock and a current rising edge of a secondary clock; monitor a calibration signal to verify alignment such that a zero state occurs when expected; and adjust a counter to maintain the alignment.