Clock Domain Converter for High-Speed Spread Spectrum Retiming
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Solution Overview
Problem
Field programmable gate arrays (FPGAs) are limited in supporting modulated clock frequencies above 10 GHz when using spread spectrum clocking, hindering compliance testers and automated test equipment in meeting regulatory electromagnetic interference (EMI) standards, especially with newer standards like USB4 and PCIE5 that require higher signaling rates.
Innovation Solution
The introduction of novel SSC converter devices and methods that include a deserializer to receive data streams with an unmodulated clock, a memory to buffer the data stream, and a serializer to retransmit the data stream with a spread spectrum clock, enabling the conversion between modulated and unmodulated clock domains, thereby allowing continued use of spread spectrum clocking in compliance testers and automated test equipment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If spread spectrum clocking is used to meet EMI regulatory limits, then electromagnetic interference is reduced, but FPGA signaling rate is limited to approximately 6 GHz
Solution Approach 1:
The patent introduces an intermediary device (converter) that translates between spread spectrum clock domain and unmodulated clock domain, allowing FPGAs to operate at high speeds while compliance testers use spread spectrum clocking to meet EMI requirements
Solution Approach 2:
The system is segmented into two separate domains: a spread spectrum clock domain for compliance testing (low EMI) and an unmodulated clock domain for FPGA operation (high speed), with a converter bridging them
2Speed
If unmodulated clock is used for FPGA operation, then signaling rate can exceed 10 GHz, but EMI regulatory limits cannot be met
Solution Approach 1:
The converter acts as an intermediary that allows the FPGA to operate in its optimal unmodulated clock domain at high speeds while translating to spread spectrum clock domain for EMI-compliant communication with compliance testers
3Object-affected harmful factors
If spread spectrum clocking is used in compliance testers, then EMI compliance is achieved, but testing capability for high-speed FPGA prototypes is lost
Solution Approach 1:
The converter enables compliance testers using spread spectrum clocking to test high-speed FPGA prototypes by translating the test data streams between spread spectrum and unmodulated clock domains, maintaining both EMI compliance and testing capability
Solution Approach 2:
The converter dynamically changes the clock domain parameters (modulation state, frequency) to match the requirements of the connected device, allowing the compliance tester to adapt to both spread spectrum and unmodulated clock domains
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the effective use of spread spectrum clocking in FPGA-based prototypes and automated test equipment, facilitating compliance with EMI regulatory limits by allowing data stream retiming with either spread spectrum or unmodulated clocks, thus supporting higher signaling rates required by advanced communication standards.
Implementation Method 1
a phase locked loop that supplies a clock signal to the serializer, the clock signal being frequency modulated in accordance with a modulation signal
Data Source
AI summary
An illustrative spread spectrum clocking (SSC) converter includes: a deserializer to receive a data stream with an unmodulated clock; a memory coupled to the deserializer to buffer the data stream; and a serializer coupled to the memory to retransmit the data stream with a spread spectrum clock. One illustrative conversion method, which may be implemented on a monolithic integrated circuit device, includes: receiving a data stream from an external transmitter in an unmodulated clock domain; storing the data stream in a buffer; and retransmitting the data stream with a spread spectrum clock. Such converters and methods may be employed in an illustrative system having: a test module to generate test data streams and to analyze result data streams for verifying operation of one or more devices under test in a spread spectrum clock domain as the test module operates in an unmodulated clock domain.