Ring-Oscillator Clock Doubler for Duty Cycle Correction
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Solution Overview
Problem
Existing clock designs face challenges in achieving optimal performance due to physical constraints such as space and surface area, leading to issues with clock cycle variation and duty cycle imperfections, which affect the quality and robustness of clock signals in electronic components.
Innovation Solution
A clock doubler system utilizing a ring oscillator and replica ring oscillators for clock measurement and correction, incorporating a calibration circuit and programmable delay circuits to ensure near-perfect clock signals with minimal power consumption and area requirements, suitable for synthesizable implementation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a clock doubler is designed to achieve high frequency multiplication accuracy, then the output clock cycle precision is improved, but the device complexity and area requirements increase
Solution Approach 1:
The patent uses replica ring oscillators that are copies of the main ring oscillator structure. These replicas measure timing information without affecting the main clock generation path. By copying the oscillator structure rather than using completely separate measurement mechanisms, the patent achieves precise clock cycle measurement while reusing existing circuit components, thereby limiting the increase in device complexity.
Solution Approach 2:
The ring oscillator serves multiple functions: it generates the clock signal for frequency multiplication and simultaneously provides timing information for measurement and correction. The same oscillator circuit is used for both clock generation and calibration purposes, eliminating the need for separate dedicated measurement circuits and reducing overall device complexity.
2Reliability
If correction circuits are added to fix duty cycle imperfections, then the clock signal quality is improved, but the power consumption and area increase
Solution Approach 1:
The patent implements a feedback mechanism where the measured timing information from the replica ring oscillators is used to generate correction values that are applied back to the clock generation process. This feedback loop enables automatic correction of duty cycle imperfections without requiring complex external control circuits, thereby improving clock signal quality while limiting the increase in power consumption.
Solution Approach 2:
The clock doubler system performs self-calibration using its own internal resources. The replica ring oscillators measure timing information that is then used to correct the main oscillator's output. This self-service approach eliminates the need for external calibration equipment or additional control logic, reducing both area requirements and power consumption compared to systems requiring external correction mechanisms.
3Measurement precision
If replica ring oscillators are used for timing measurement, then the clock measurement accuracy is improved, but the area requirements and device complexity increase
Solution Approach 1:
Instead of using completely separate and independent measurement circuits, the patent creates compact replicas of the ring oscillator structure. These replicas are scaled-down versions that consume less area while still providing accurate timing measurements. The copying approach allows precise measurement with minimal additional area compared to using entirely different measurement methodologies.
Solution Approach 2:
The patent merges the clock generation function and the timing measurement function into a unified structure using the same ring oscillator topology. By combining these functions rather than implementing them as separate independent systems, the patent achieves accurate timing measurement while sharing common circuit elements, thereby reducing the total area required compared to fully separate implementations.
Data Source
AI summary
A synthesizable clock doubler is disclosed. The clock doubler is implemented using unique combination of logic cells from a standard cell library. At the core of the clock doubler is a high-frequency ring oscillator that generates timing information for clock measurements. Replica ring oscillators are used to generate programmable delays for the correction of the output clock imperfection, such as cycle-to-cycle variation and duty cycle of the doubled clock.