Clock Driver Impedance Matching Across Output Amplitude States
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Solution Overview
Problem
Clock driver circuits face challenges in maintaining output impedance matching for different output amplitude levels, leading to degradation in return loss when switching between high and low amplitude states.
Innovation Solution
The proposed solution involves an output stage with a first and second arm, each including a transistor and resistor, and an output impedance adjusting circuit that applies different body voltages and supply voltages to reduce impedance differences across states, utilizing a diode-connected transistor, bypass transistor, resistor, and pull-down transistor to maintain high return loss (>10 dB) across varying supply voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the supply voltage is reduced to lower output amplitude, then power consumption is reduced, but output impedance matching deteriorates
Solution Approach 1:
The patent changes the body voltage parameter of the output transistor independently from the supply voltage. When supply voltage is reduced to lower output amplitude, the body voltage is adjusted to compensate for the impedance change, maintaining consistent output impedance matching across different power consumption states.
Solution Approach 2:
The patent implements dynamic adjustment of the body voltage based on the supply voltage state. The output impedance adjusting circuit continuously monitors and adjusts the body voltage to maintain optimal impedance matching as the supply voltage changes between high and low states.
2Adaptability or versatility
If the supply voltage is switched between high and low states, then output amplitude is controlled, but return loss degrades
Solution Approach 1:
The patent changes the body voltage parameter in response to supply voltage transitions. When the supply voltage switches between high and low states to control output amplitude, the body voltage is simultaneously adjusted to maintain consistent output impedance, thereby preserving return loss performance across all amplitude states.
3Reliability
If body voltage is adjusted to maintain impedance matching, then output impedance consistency is improved, but circuit complexity increases
Solution Approach 1:
The patent introduces an output impedance adjusting circuit as an intermediary component that mediates between the supply voltage and the output transistor. This circuit includes a body voltage source and control transistors that work together to adjust the body voltage, maintaining impedance consistency without requiring complete redesign of the output stage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration ensures consistent high return loss (>10 dB) across different states, improving phase noise performance and reducing on-resistance, thereby maintaining reliable clock signal transmission.
Implementation Method 1
the output impedance adjusting circuit is configured to: apply a first body voltage to the body terminal when the first voltage source is at the first supply voltage, and apply a second body voltage, different from the first body voltage, to the body terminal when the first voltage source is at the second supply voltage
Data Source
AI summary
A clock driver circuit. In some embodiments the clock driver circuit includes an output stage, a first voltage source, and an output impedance adjusting circuit. The output stage includes a first transistor connected to the first voltage source and to an output of the drive circuit. The drive circuit is configured to operate in one of, at least, a first state, and a second state. The output impedance adjusting circuit is configured to reduce a difference between an output impedance of the drive circuit in: the first state, in which the first transistor is turned on and the first voltage source is at a first supply voltage, and the second state, in which the first transistor is turned on and the first voltage source is at a second supply voltage different from the first supply voltage.