Clock Duty Cycle Correction Circuit With Two-Stage Delay Control
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Solution Overview
Problem
Existing correction circuits face challenges in accurately adjusting the duty cycle of received clocks due to variations in delay unit performance and unintended power supply variations, leading to degraded adjustment accuracy and longer time required for duty cycle correction.
Innovation Solution
A correction circuit comprising a detection unit, a delay unit, and a waveform shaping unit that measures the high-level periods of input clocks, generates delay clocks based on period differences, and adjusts the output clock to achieve a 50% duty cycle by selectively connecting delay units to minimize performance variations and reduce the number of series-connected delay circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If delay units are connected in series to adjust duty cycle, then the adjustment range is improved, but the adjustment accuracy degrades due to accumulated performance variations
Solution Approach 1:
The correction circuit divides the duty cycle adjustment into two independent stages: a coarse adjustment stage using a first delay circuit to correct large duty cycle deviations, and a fine adjustment stage using a second delay circuit to achieve precise 50% duty cycle. This segmentation prevents accumulated errors by resetting the delay reference at each stage, thereby maintaining high adjustment accuracy while achieving full adjustment range.
2Adaptability or versatility
If more delay units are connected in series to increase adjustment range, then the adaptability is improved, but the time required for duty cycle correction increases
Solution Approach 1:
The two-stage delay structure enables parallel operation of coarse and fine adjustments, significantly reducing total correction time compared to sequential adjustment through a long series of delay units. The coarse adjustment quickly brings the duty cycle close to 50%, while the fine adjustment simultaneously achieves precise positioning, eliminating the need for lengthy sequential adjustments.
Solution Approach 2:
The first delay circuit performs preliminary coarse adjustment to bring the duty cycle close to the target 50% value before the second delay circuit performs fine adjustment. This preliminary action reduces the adjustment burden on the second stage, enabling faster convergence to the precise target duty cycle.
3Adaptability or versatility
If delay units are connected in series to achieve duty cycle correction, then the adjustment capability is improved, but the impact of power supply variations increases
Solution Approach 1:
Dividing the adjustment into two independent delay stages with separate reference clocks reduces the cumulative impact of power supply variations. Each delay circuit operates independently with its own reference, preventing error accumulation that would occur in a long series connection, thereby improving stability against power supply fluctuations.
Data Source
AI summary
A correction circuit includes a first detection unit, a second detection unit, a delay unit, and a waveform shaping unit. The first detection unit is configured to measure a first period of a high level of a first clock. The second detection unit is configured to measure a second period of a high level of a second clock that is complementary to the first clock. The delay unit is configured to generate a first delay clock and a second delay clock according to a difference between the first period and the second period. The waveform shaping unit is configured to generate a third clock having a logic level which is switched based on an edge of the first delay clock and an edge of the second delay clock.