Transmission Circuit Clock Duty Control for DCD Correction

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Solution Overview

Problem

Existing transmission circuits suffer from duty cycle distortion (DCD) in data signals due to mismatches in transistor threshold values and insufficient bandwidth, leading to reduced data quality and increased reproduction errors.

Innovation Solution

Incorporation of a DCD detecting circuit and DCD adjusting circuit within the transmission circuit to detect and correct duty cycle distortions by controlling the duty ratio of clock signals, using field effect transistors and resistors to adjust the duty cycle of data signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a clock signal is used to generate data signals, then data transmission is enabled, but duty cycle distortion occurs due to transistor threshold mismatches and insufficient bandwidth

Engineering Contradiction:

Improvedata qualityVSAvoidduty cycle accuracy

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

The patent implements a feedback mechanism where the duty cycle of the data signal is detected and compared against a reference, and the clock signal's duty cycle is adjusted based on the detection results to correct distortions in the transmitted data signal

Inventive Principle:

Principle #23Feedback

Solution Approach 2:

The transmission circuit performs self-correction by automatically detecting its own duty cycle distortion and adjusting the clock signal duty cycle without external intervention, enabling the system to compensate for manufacturing variations and operational drift

Inventive Principle:

Principle #25Self-service

2Reliability

If the bandwidth of the transmission circuit is increased to reduce distortion, then signal fidelity improves, but device complexity and power consumption increase

Engineering Contradiction:

Improvesignal fidelityVSAvoidcircuit complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

Instead of increasing bandwidth, the patent changes the duty cycle parameter of the clock signal dynamically to compensate for distortion, achieving improved signal fidelity through parameter adjustment rather than bandwidth expansion

Inventive Principle:

Principle #35Parameter changes

3Manufacturing precision

If transistor threshold values are made more precise to reduce duty cycle distortion, then manufacturing precision improves, but manufacturing cost and device complexity increase

Engineering Contradiction:

Improvetransistor threshold matchingVSAvoidmanufacturing cost

Core Design Contradiction:

Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent uses feedback-based duty cycle detection and adjustment to compensate for transistor threshold mismatches, allowing standard manufacturing processes to be used while achieving high precision through automatic correction

Inventive Principle:

Principle #23Feedback

Data Source

PatentEP3518420B1Transmission circuit and integrated circuit

Publication Date: 2025.10.15 SOCIONEXT INC

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AI summary

A transmission circuit includes: a data generating circuit configured to generate data based on a clock signal; a clock generating circuit configured to supply the clock signal to the data generating circuit; and a duty ratio controlling circuit configured to detect a duty cycle distortion of the data output from the data generating circuit, and control a duty ratio of the clock signal based on a result of the detection.