Switching Power Supply Clock Alignment for Async-Sync Transitions
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Solution Overview
Problem
Switching converters face challenges in synchronizing their operating modes efficiently, particularly during transitions from asynchronous to synchronous modes, which can lead to significant voltage drops due to rapid capacitor discharge during mode changes.
Innovation Solution
A switching power supply device and method that incorporates a clock signal generating circuit capable of switching between a first synchronized operating mode and a second asynchronous mode, where the clock signal is adjusted to match the closest rising edge between a second clock signal and its complementary signal, ensuring smoother transitions and reduced voltage drops.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the switching converter transitions from asynchronous to synchronous mode, then the operating mode is improved, but significant voltage drops occur due to rapid capacitor discharge
Solution Approach 1:
The patent applies preliminary action by pre-synchronizing the clock signal to the closest rising edge of the second clock signal before the mode transition occurs. This advance synchronization ensures that when the converter switches from asynchronous to synchronous mode, the capacitor discharge is minimized because the clock phases are already aligned, preventing the significant voltage drops that would otherwise occur during abrupt mode changes
2Loss of energy
If the clock signal is synchronized to the closest rising edge, then voltage drops are reduced, but the clock signal generating circuit complexity increases
Solution Approach 1:
The patent uses an intermediary approach by introducing a selection circuit that chooses between the second clock signal and its complementary signal based on which one has the closest rising edge to the desired synchronization point. This intermediary selection mechanism allows the system to achieve optimal synchronization with minimal voltage drop while adding only moderate complexity through a straightforward selection logic rather than a completely complex clock generation system
Data Source
AI summary
In an embodiment, a device includes a switching power supply configured to have a first operating mode synchronized by a first clock signal generated by a clock generator a second asynchronous operating mode. The clock generator is configured such that the first clock signal becomes equal, upon transition from the second operating mode to the first operating mode, to the signal having the closest rising edge of a second clock signal and a third clock signal complementary to the second clock signal.