Clock Extraction via Edge Analysis on TSEQ Pattern
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Solution Overview
Problem
Portable electronic devices with USB ports face challenges in reducing production cost and size due to the need for multiple crystal oscillators or high-precision voltage-controlled oscillators (VCOs).
Innovation Solution
A method and apparatus for clock extraction using edge analysis on a training sequence equalization (TSEQ) pattern to estimate edge numbers, generate analysis results, and perform frequency calibration on an oscillator's output clock, eliminating the need for high-precision VCOs by utilizing a numerically controlled oscillator (NCO) and edge analysis circuit to generate a reference clock.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple crystal oscillators or high-precision VCOs are used in portable electronic devices with USB ports, then clock accuracy is improved, but production cost and device size increase
Solution Approach 1:
The patent replaces expensive high-precision VCOs with inexpensive crystal oscillators combined with a numerically controlled oscillator (NCO) and edge analysis circuitry. The system uses a low-cost crystal oscillator running at a multiple of the target frequency, then digitally synthesizes the accurate reference clock through NCO techniques, achieving high clock accuracy without the high cost of precision analog oscillators.
Solution Approach 2:
The patent substitutes the mechanical/analog approach of using high-precision VCOs with a digital signal processing approach. Edge analysis circuitry detects transitions in training sequences, and an NCO algorithmically generates the reference clock signal, replacing complex analog frequency control with digital computation and signal synthesis.
2Measurement precision
If multiple crystal oscillators or high-precision VCOs are used in portable electronic devices with USB ports, then clock accuracy is improved, but production cost and device size increase
Solution Approach 1:
The patent combines the functions of multiple oscillators into a single crystal oscillator operating at a higher frequency, paired with digital signal processing. The NCO and edge analysis circuitry integrate frequency synthesis and clock recovery functions that would otherwise require separate high-precision oscillator components, reducing overall device volume.
Solution Approach 2:
The crystal oscillator operating at a multiple frequency (e.g., 200 MHz for USB 3.0's 100 MHz reference) serves multiple purposes: it provides the clock signal for USB operation, enables TSEQ pattern generation for training, and supports edge analysis for clock recovery. This multi-functional approach eliminates the need for separate oscillators for different functions.
3Ease of manufacture
If edge analysis is performed on TSEQ pattern to perform frequency calibration, then the need for high-precision VCO is eliminated, but signal processing complexity increases
Solution Approach 1:
The patent performs edge analysis on predetermined training sequence equalization (TSEQ) patterns that are transmitted during USB link training. By analyzing edge transitions in these known patterns, the system can calibrate the NCO frequency before normal data transmission begins, simplifying the overall process compared to continuous calibration during operation.
Solution Approach 2:
The edge analysis circuitry counts transitions in the TSEQ pattern and feeds this information back to adjust the NCO frequency. This feedback mechanism automatically calibrates the clock signal to match the USB specification requirements without manual intervention or complex external equipment.
Data Source
AI summary
A method and apparatus for performing clock extraction are provided. The method includes: performing edge analysis on a Training Sequence Equalization (TSEQ) pattern carried by a set of received signals that are received from a Universal Serial Bus (USB) port of an electronic device, to dynamically generate a plurality of analysis results; and performing frequency calibration on a frequency of an output clock of a Numerically Controlled Oscillator (NCO) according to a frequency that different types of analysis results within the plurality of analysis results alternatively occur, to utilize the output clock as a reference clock after completing the frequency calibration. More particularly, the method further includes: generating a set of de-multiplexed signals respectively corresponding to a plurality of bits, to perform the edge analysis by comparing respective voltage levels of de-multiplexed signals corresponding to every two adjacent bits of the plurality of bits within the set of de-multiplexed signals.