Clock Generation Chipset with Filtered External Feedback Selection
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Solution Overview
Problem
Conventional clock generation units malfunction due to feedback clock distortion, leading to improper adjustments in the output clock frequency, causing malfunctions in coupled electronic elements.
Innovation Solution
A chipset with a frequency filter that estimates the swings and frequency of a feedback clock from an external unit, using a multiplexer and determining unit to selectively output either the feedback clock or the output clock as the feedback clock, preventing distorted clocks from affecting the clock generator.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the clock generation unit uses the feedback clock from the external circuit to adjust the output clock frequency, then the output clock can be properly synchronized with the external circuit, but the system becomes vulnerable to distortion from the external circuit causing improper adjustments and malfunctions
Solution Approach 1:
The patent introduces a frequency filter as an intermediary component between the external feedback clock source and the clock generation unit. This filter detects frequency deviations and swing abnormalities in the feedback clock, and selectively blocks distorted clocks from reaching the phase frequency detector and VCO, thereby protecting the system while still allowing valid feedback clocks to pass through for proper synchronization
Solution Approach 2:
The frequency filter performs preliminary detection and filtering of the feedback clock before it enters the main clock generation pathway. By detecting frequency deviations and abnormal swings in advance, the system can prevent distorted clocks from causing improper adjustments, while still permitting valid feedback clocks to synchronize the output clock properly
Data Source
AI summary
Chipsets capable of preventing malfunction caused by feedback clock distortion are provided, in which a phase frequency detector generates a control voltage according to a first reference clock and a first feedback clock, a voltage-controlled oscillator generates an output clock according to the control voltage, a frequency divider performs a frequency-division on a second feedback clock to obtain the first feedback clock, and a frequency filter estimates swings and frequency of a third feedback clock from an external unit and selectively outputs one of the third feedback clock or the output clock to serve as the second clock.