Clock Generator Feedback Circuit for Supply-Noise-Stable Timing
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Solution Overview
Problem
There is a need for a clock generator that can produce high-accuracy clock signals while operating at low power, especially in highly integrated and high-speed electronic devices, where existing solutions struggle to maintain reliability due to fluctuations in power supply voltage.
Innovation Solution
A clock generating device that includes a first voltage output circuit, a clock output circuit, a negative feedback voltage generating circuit, and a second voltage output circuit, where the negative feedback voltage is generated using a switched capacitor circuit and a sample and hold circuit to reduce sensitivity to power supply voltage fluctuations, allowing for high-accuracy clock signal generation even under varying conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a clock generator operates at high speed with high integration, then productivity and functionality are improved, but reliability deteriorates due to sensitivity to power supply voltage fluctuations
Solution Approach 1:
The patent implements a negative feedback mechanism where the clock output circuit generates a feedback signal based on the actual clock frequency, which is then compared with a reference frequency in a frequency detection circuit. The difference is corrected by adjusting the clock generation parameters, thereby compensating for variations caused by power supply voltage fluctuations and maintaining reliable clock signal accuracy during high-speed operation.
Solution Approach 2:
The patent dynamically adjusts operating parameters of the clock generation circuit based on detected frequency deviations. By changing parameters such as duty cycle or timing characteristics in response to power supply variations, the system maintains stable clock signal accuracy while operating at high speeds, resolving the contradiction between productivity and reliability.
2Measurement precision
If power supply voltage is increased to improve clock signal accuracy, then measurement precision is improved, but use of energy increases
Solution Approach 1:
Instead of increasing power supply voltage to improve accuracy, the patent uses a feedback-based frequency detection and correction mechanism that maintains clock signal accuracy through intelligent control. The system detects frequency deviations and adjusts operating parameters accordingly, achieving high measurement precision without proportionally increasing power consumption.
Solution Approach 2:
The patent optimizes operating parameters such as duty cycle and timing characteristics to maintain clock signal accuracy while operating at lower power levels. By dynamically adjusting these parameters based on feedback, the system achieves high measurement precision without the need to continuously increase power supply voltage, thereby reducing overall energy consumption.
3Reliability
If voltage fluctuation sensitivity is reduced to improve reliability, then stability is improved, but device complexity increases
Solution Approach 1:
The patent employs a feedback-based frequency detection and correction system that reduces voltage fluctuation sensitivity through intelligent control rather than complex circuit design. The frequency detection circuit monitors clock output and the control circuit adjusts parameters to compensate for variations, achieving high operation stability with relatively simple additional components compared to the complexity of designing entirely new low-sensitivity circuits.
Data Source
AI summary
A clock generating device includes a first voltage output circuit configured to output a first voltage corresponding to a power supply voltage in response to a preliminary clock signal, a clock output circuit configured to generate the preliminary clock signal and a final clock signal at a period corresponding to a difference between the first voltage and a negative feedback voltage, a negative feedback voltage generating circuit configured to generate the negative feedback voltage from a reference value corresponding to a frequency of the final clock signal and a second voltage and filtered to a uniform voltage level, and a second voltage output circuit configured to output the second voltage to the negative feedback voltage generating unit, the second voltage having lower sensitivity of fluctuations in the power supply voltage than the first voltage.