Clock Filter Negative Resistance for Low-Noise Signal Distribution
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Solution Overview
Problem
Integrated circuits face degradation of clock signals due to co-existing digital signals, leading to jitter and noise, and routing buffers contribute to power consumption and noise addition.
Innovation Solution
A clock filter circuit incorporating a negative resistor circuit and bandpass filters with trimmable capacitors to enhance the quality factor and attenuate noise, comprising inverters, capacitors, and inductors, which helps in maintaining a high-quality clock signal by tuning the center frequency and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If routing buffers are added to the clock signal path, then the clock signal can be distributed to multiple functional circuits, but noise is added and power consumption increases
Solution Approach 1:
The patent extracts the clock signal from the noisy digital signal environment by using a bandpass filter that selectively passes only the clock frequency component while blocking other frequencies. This separates the useful clock signal from the harmful noise generated by digital circuits, resolving the contradiction between distributing the clock signal and maintaining its purity.
Solution Approach 2:
The patent introduces a filter circuit as an intermediary between the digital circuits and the clock signal path. This intermediary component attenuates noise from digital signals before they can degrade the clock signal, allowing multiple functional circuits to receive the clock signal without directly coupling noise into the clock distribution network.
2Ease of operation
If routing buffers are added to the clock signal path, then the clock signal can be distributed to multiple functional circuits, but power consumption increases
Solution Approach 1:
The filter circuit extracts and amplifies only the clock frequency component while rejecting other frequencies, which allows the use of smaller, lower-power buffers. By pre-filtering the signal, the buffers don't need to handle the full bandwidth of noisy digital signals, reducing their power consumption while still achieving widespread clock distribution.
3Adaptability or versatility
If digital signals co-exist on the chip, then multiple functional circuits can operate, but the clock signal degrades with jitter and spurious tones
Solution Approach 1:
The patent converts the harmful effect of digital signal co-existence into a benefit by using the digital signals themselves to control the filtering process. The digital control signals switch the filter between different states, allowing the system to dynamically adapt to different operational modes while the filter continuously removes noise and spurious tones from the clock signal, thereby maintaining clock quality despite multiple functional circuits operating simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively attenuates noise and spurious signals, increases the quality factor of the clock filter, and reduces power consumption by allowing a smaller inverter size while maintaining signal integrity and immunity to power supply and ground noise.
Implementation Method 1
A clock filter circuit includes a negative resistor circuit coupled to a bandpass filter. The bandpass filter includes a resonant circuit and an inverter. The negative resistor circuit increases the quality factor of the bandpass filter.
Implementation Method 2
The bandpass filter includes a resonant circuit and an inverter. The negative resistor circuit increases the quality factor of the bandpass filter, thereby attenuating noise and spurious signals.
Implementation Method 3
The bandpass filter includes a resonant circuit and an inverter. The resonant circuit is configured to oscillate at the clock frequency.
Data Source
AI summary
A circuit includes a filter, a first inverter, and a second inverter. The filter is coupled to an input of the first inverter. The second inverter includes an input and an output. The input of the second inverter is coupled to the output of the first inverter. The output of the second inverter is coupled to the input of the first inverter. The filter includes a notch filter and a bandpass filter.