Clock Generation Circuit With Reference-Guided Frequency Adjustment
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Solution Overview
Problem
Designing a wireless interface that provides an accurate operational clock signal at a low cost is challenging due to the high frequency and low adjustability of stable clock sources, which often require costly redesign of oscillator circuits.
Innovation Solution
A clock generation circuit comprising a fixed clock source, a variable clock source, a timing adjustment circuit, and a pulse width signal generator, where the timing adjustment circuit determines if the operational clock signal's frequency is N times the target frequency, adjusting it if necessary, and the pulse width signal generator divides the frequency to generate a pulse width modulation signal with the target frequency, using a low-cost variable clock source.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a stable clock source with high frequency is used, then clock stability is improved, but frequency adjustability deteriorates
Solution Approach 1:
The clock generation system is segmented into multiple independent clock sources (fixed clock source and variable clock source), each with distinct characteristics. The fixed clock source provides stable high-frequency reference, while the variable clock source provides frequency adjustability. This segmentation allows the system to leverage the strengths of each independent component without compromise.
Solution Approach 2:
The timing adjustment circuit acts as an intermediary between the fixed and variable clock sources. It receives signals from both sources, compares their frequencies, and controls the variable clock source to achieve the target frequency. This intermediary component enables coordination between the two clock sources to resolve the contradiction between stability and adjustability.
2Adaptability or versatility
If the oscillator circuit is redesigned to adjust frequency, then frequency adjustability is improved, but manufacturing cost deteriorates
Solution Approach 1:
The variable clock source is designed as a multi-functional component that can operate across a range of frequencies without requiring different circuit designs. This universal component provides frequency adjustability while maintaining ease of manufacture, as the same hardware can serve multiple frequency requirements through software or control signal adjustments rather than physical redesign.
Solution Approach 2:
The invention uses a cost-effective variable clock source that can be easily manufactured and replaced if needed, rather than investing in expensive custom-designed oscillator circuits. The variable clock source provides sufficient frequency adjustability at a lower manufacturing cost, making it an economical solution for frequency-tunable applications.
3Adaptability or versatility
If a variable clock source is used, then frequency adjustability is improved, but frequency accuracy deteriorates
Solution Approach 1:
The timing adjustment circuit implements a feedback mechanism that continuously monitors the frequency of the variable clock source and adjusts it based on comparison with the fixed reference clock. This feedback loop ensures that the variable clock source maintains accurate frequency values while remaining adjustable, resolving the contradiction between adjustability and accuracy.
Solution Approach 2:
The system changes the operating parameters of the variable clock source dynamically based on the required target frequency. By adjusting parameters such as division ratios or control voltages in response to timing feedback, the variable clock source can achieve both frequency adjustability and accuracy through parameter optimization rather than hardware changes.
Data Source
AI summary
A clock generation circuit and a clock adjustment method thereof are provided. The clock generation circuit includes a fixed clock source, a variable clock source, a timing adjustment circuit, and a pulse width signal generator. The fixed clock source generates a reference clock signal having a fixed frequency. The variable clock source receives a frequency setting signal to correspondingly generate an operational clock signal having a variable frequency. The timing adjustment circuit determines whether a frequency of the operation clock signal is N times of a target frequency according to the reference clock signal to set a frequency of the operation clock signal. The pulse width signal generator divides the operating clock signal to generate a pulse width modulation signal having the target frequency.

