Closed-Loop Clock Frequency Deviation Detection and Calibration

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Solution Overview

Problem

Existing clock frequency monitoring systems lack an efficient method for detecting deviations in clock frequencies and calibrating them in real-time, which can lead to performance issues in circuits and communication devices.

Innovation Solution

The proposed solution involves a clock frequency deviation detector with closed-loop calibration, utilizing a switched capacitor, current digital-to-analog converter (DAC), reference voltage generator, and voltage comparing device to generate a frequency deviation detection signal based on comparisons between switched capacitor voltage and reference voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If real-time clock frequency monitoring and calibration is implemented, then performance and reliability of circuits are improved, but device complexity increases

Engineering Contradiction:
Improveclock frequency stabilityVSAvoidmonitoring system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a closed-loop calibration system where the voltage comparing device continuously monitors the switched capacitor voltage and generates a frequency deviation detection signal. This feedback mechanism automatically adjusts the clock frequency by modifying the digital signal to the current DAC, eliminating manual calibration needs and ensuring real-time frequency stability without requiring complex external monitoring equipment

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The calibration system is self-regulating through the interaction of its components: the switched capacitor generates voltage based on clock frequency, the voltage comparing device detects deviations, and the system automatically corrects by adjusting the current DAC. This self-service mechanism maintains clock frequency stability without requiring external intervention or complex control systems

Inventive Principle:
Principle #25Self-service

2Measurement precision

If closed-loop calibration is implemented to maintain clock frequency within specifications, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improvefrequency deviation detection accuracyVSAvoidcalibration system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent replaces complex mechanical or external calibration systems with an integrated electronic solution using a switched capacitor and voltage comparing device. This electronic approach achieves precise frequency deviation detection by comparing voltages generated from the clock signal itself, eliminating the need for external frequency counters or complex measurement equipment while maintaining high measurement precision

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Measurement precision

If multiple calibration points are used to cover full frequency range, then measurement precision is improved, but loss of time increases

Engineering Contradiction:
Improvefrequency calibration accuracyVSAvoidcalibration time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The system performs preliminary calibration by establishing the relationship between the switched capacitor voltage and clock frequency during system initialization or manufacturing. Once calibrated, the voltage comparing device can continuously detect frequency deviations in real-time without requiring repeated calibration cycles, significantly reducing calibration time while maintaining measurement precision across the full frequency range

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12348606B2Clock frequency deviation detector with closed-loop calibration
Publication Date: 2025.07.01 QUALCOMM INC
  • US12348606B2 patent drawing
  • US12348606B2 patent drawing
  • US12348606B2 patent drawing

AI summary

An apparatus, including: a switched capacitor configured to generate a switched capacitor voltage based on an input clock signal and a current; a current digital-to-analog converter (DAC) configured to generate the current based on a first digital signal; a first reference voltage generator configured to generate a first reference voltage; and a first voltage comparing device configured to generate a first frequency deviation detection signal based on a comparison of the switched capacitor voltage to the first reference voltage.