Clock Frequency Control via Operating Circuit Count Prediction
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Solution Overview
Problem
Conventional adaptive clocking control (ACC) circuits in semiconductor integrated circuits struggle to handle sudden power supply noise effectively, often lowering the clock frequency unnecessarily due to detection delays, leading to increased frequency adjustments and potential timing errors.
Innovation Solution
An information processing apparatus that detects the number of operating circuits and compares this to a pre-calculated threshold to determine if power supply noise likely to cause a timing error will occur, and adjusts the clock frequency accordingly, thereby preventing unnecessary frequency changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ACC circuits use voltage sensors or delay measurement circuits to detect power supply noise, then timing errors can be prevented, but detection delays cause the clock frequency to be lowered only after power supply noise substantially occurs, making it difficult to handle sudden noise events
Solution Approach 1:
The patent predicts power supply noise occurrence before it substantially happens by monitoring the number of operating circuits and comparing it with a threshold value. This preliminary detection allows the system to lower the clock frequency in advance, eliminating the detection delay inherent in conventional voltage sensors and delay measurement circuits.
Solution Approach 2:
The patent introduces a power supply noise prediction unit that acts as an intermediary between the operating circuits and the clock frequency control. This prediction unit uses the number of operating circuits as an indirect indicator to predict power supply noise, avoiding the need for direct voltage measurement and subsequent delay.
2Reliability
If conventional ACC circuits set a relatively high threshold to start lowering clock frequency early enough to account for delay time, then sudden power supply noise can be handled, but the clock frequency may be lowered even when relatively small power supply noise that is unlikely to cause a timing error occurs, increasing the number of times the clock frequency is lowered
Solution Approach 1:
The patent changes the parameter used for noise detection from voltage level to the number of operating circuits. By establishing a threshold for the number of operating circuits, the system can predict power supply noise more accurately without the need for high thresholds that cause unnecessary frequency adjustments.
Solution Approach 2:
The patent replaces the mechanical voltage measurement system with a logical prediction system based on circuit operation states. This substitution allows for more precise control by predicting noise based on actual circuit activity rather than reacting to voltage drops after they occur.
Data Source
AI summary
In an information processing apparatus, a control unit receives operation instructions. Each time receiving an operation instruction, the control unit detects the number of operating circuits that are to operate in accordance with the received operation instruction, in a circuit group of circuits that operate in synchronization with a clock signal. In addition, each time receiving an operation instruction, the control unit determines whether power supply noise that is likely to cause a timing error in the circuit group will occur, on the basis of a result of comparing an increase in the number of operating circuits per prescribed time period with a threshold, and lowers the frequency of the clock signal when determining that the power supply noise will occur.