Clock Frequency Detection Circuit Without a Reference Clock
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Solution Overview
Problem
Existing memory circuits face inefficiencies in power consumption due to maintaining high operating currents for high-frequency reading operations and wasting current during low-frequency operations, as they require a reference clock signal for frequency detection.
Innovation Solution
A frequency detection device comprising a pulse signal generator, a sampling signal generator, a delay device, and a sampling circuit that detects the frequency of a clock signal without a reference clock signal, allowing for adjustments in the operating clock and bias of subsequent circuits to reduce overall power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a reference clock signal is used for frequency detection, then the frequency detection accuracy is improved, but the power consumption and circuit area increase
Solution Approach 1:
The patent extracts the frequency detection function from the traditional reference clock signal-based approach and implements it using the existing clock signal itself through edge detection and pulse counting. This eliminates the need for the separate reference clock signal, thereby reducing power consumption while maintaining detection accuracy.
Solution Approach 2:
The clock signal serves multiple functions: it is both the signal to be detected and the basis for frequency measurement. By using the clock signal's own transition edges for detection, the system eliminates the need for a separate reference clock, reducing overall power consumption and circuit complexity.
2Measurement precision
If a reference clock signal is used for frequency detection, then the frequency detection accuracy is improved, but the circuit area increases
Solution Approach 1:
The patent removes the reference clock signal component from the system architecture, using only the existing clock signal and its transition edges for frequency detection. This extraction eliminates the additional circuitry required for reference clock generation and distribution, thereby reducing circuit area.
Solution Approach 2:
The frequency detection function is merged with the existing clock signal processing path. By detecting transition edges of the clock signal itself and using its frequency for pulse generation, the system combines multiple functions into existing circuit blocks, reducing the need for separate reference clock circuitry.
3Speed
If high operating current is maintained for high-frequency reading operations, then the reading speed is improved, but the power consumption increases during low-frequency operations
Solution Approach 1:
The patent implements dynamic adjustment of operating current based on detected clock signal frequency. The sense amplifier and charge pump circuit operating currents are adjusted according to the actual reading frequency, allowing high current for high-speed operations and low current for low-speed operations, thereby optimizing power consumption across different operating conditions.
Solution Approach 2:
The system uses feedback from the frequency detection mechanism to control the operating current of the sense amplifier and charge pump circuit. The detected clock frequency information is fed back to adjust the operating parameters, ensuring that high current is only used when high-frequency reading operations are actually required.
Data Source
AI summary
A frequency detection device for a clock signal and a detection method thereof are provided. The frequency detection device includes a pulse signal generator, a sampling signal generator, a delay device, and a sampling circuit. The pulse signal generator detects a plurality of transition edges of the clock signal and generates a pulse signal according to the transition edges of the clock signal. The sampling signal generator generates a sampling signal based on a command signal according to pluses of the pulse signal. The delay device delays the command signal to generate a delayed command signal. The sampling circuit samples the delayed command signal according to the sampling signal to generate a detection result.