Clock Monitoring Circuit for Multi-Range Frequency Fault Detection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Electronic devices face misoperation due to clock signals with incorrect frequencies, necessitating a method to detect and monitor various frequency defects in clock signals.
Innovation Solution
A clock monitoring circuit that includes a clock enable signal generator and detectors to determine whether a selection clock signal is within normal, high, low, or ultra-high frequency ranges, and detects frequency shifts, using reference clock signals and measurement intervals to generate determination signals indicating the status of the clock signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a clock signal has a high frequency, then the operation speed of electronic devices is improved, but the risk of frequency defects and misoperation increases
Solution Approach 1:
The patent implements preliminary detection of clock signal frequency before the signal is used for device operation. The detection circuit measures the frequency of the clock signal in advance, compares it with the standard frequency range, and generates a detection result that can be used to determine whether the device should operate. This preliminary action prevents misoperation due to frequency defects while allowing high-frequency operation when the signal is valid.
2Reliability
If frequency detection is implemented to prevent misoperation, then reliability is improved, but the device complexity increases
Solution Approach 1:
The detection circuit is designed to handle multiple frequency ranges (low frequency, high frequency, and ultra-high frequency) using a unified detection architecture. The circuit can detect clock signals across different frequency ranges by adjusting detection parameters, eliminating the need for separate detection circuits for each frequency range. This multi-functionality reduces overall device complexity while maintaining comprehensive frequency detection capability.
Solution Approach 2:
The patent introduces a detection circuit as an intermediary component between the clock signal source and the electronic device. This intermediary detects the frequency of the clock signal and provides detection results that mediate the decision-making process for device operation. By placing this intermediary in place, the system can reliably detect frequency defects without requiring complex integration into the core device logic.
3Measurement precision
If multiple detection ranges are monitored, then measurement precision is improved, but the device complexity increases
Solution Approach 1:
The frequency detection range is segmented into distinct bands: low frequency range, high frequency range, and ultra-high frequency range. The detection circuit processes each segment separately by counting clock signal cycles within specific time periods corresponding to each range. This segmentation allows precise detection of frequency defects in each band while using a relatively simple counting-based detection method for each segment, rather than requiring a single complex detection mechanism.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A clock monitoring circuit includes a clock enable signal generator configured to generate an ultra-high frequency clock enable signal based on a clock enable control signal and a reference clock signal, and an ultra-high frequency detector configured to generate an ultra-high frequency determination signal indicating whether a selection clock signal is an ultra-high frequency signal, based on the selection clock signal, the ultra-high frequency clock enable signal, and the reference clock signal.