Clock Circuit Frequency Hopping Without Phase Relocking
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing clock circuits face challenges in efficiently performing frequency hopping without the need to relock timing and phase, particularly when transitioning between different frequencies or spread spectrum ranges.
Innovation Solution
A clock circuit incorporating a frequency divider and frequency hopping circuit that stabilizes frequency transitions by stepwise changing the divisor number, allowing frequency hopping without relocking timing or phase, and includes a spread spectrum function for varying frequencies within defined ranges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the clock circuit performs frequency hopping by directly changing the divisor number to the target value, then the frequency hopping speed is improved, but frequency overshoot occurs and timing/phase relocking is required
Solution Approach 1:
The patent applies preliminary action by performing frequency pre-adjustment before the actual frequency hopping. When a frequency hop is required, the circuit first adjusts the divisor number to an intermediate value that corresponds to a frequency close to the target frequency, but slightly lower. This preliminary adjustment prepares the VCO to be near the target frequency, enabling a smooth transition without overshoot when the final hopping occurs.
Solution Approach 2:
The patent implements dynamics by making the divisor number adjustable and time-varying. Instead of using a fixed divisor number, the circuit dynamically changes the divisor number in two stages: first to an intermediate value for pre-adjustment, then to the final target value for complete frequency hopping. This dynamic adjustment mechanism allows the system to adaptively control the frequency transition process.
2Device complexity
If the clock circuit uses a fixed divisor number for frequency division, then the circuit complexity is reduced, but the frequency hopping function cannot be implemented
Solution Approach 1:
The patent makes the divisor number dynamic and adjustable rather than fixed. The divisor number is stored in a register that can be modified by the control unit, allowing the frequency division ratio to change according to different operating modes (normal mode, spread spectrum mode, frequency hopping mode). This dynamic property enables the circuit to implement frequency hopping while maintaining relatively simple structure.
Solution Approach 2:
The patent implements multi-functionality by designing the frequency division circuit to support multiple operating modes through a single adjustable divisor number. The same frequency division circuit can operate in normal frequency division mode, spread spectrum mode with dithering, and frequency hopping mode with pre-adjustment, eliminating the need for separate circuits for each function.
3Adaptability or versatility
If the clock circuit implements spread spectrum function with frequent divisor number changes, then the spread spectrum effect is improved, but frequency instability and overshoot are caused
Solution Approach 1:
The patent applies preliminary action in spread spectrum operation by performing frequency pre-adjustment before making large divisor number changes. When frequency hopping is required during spread spectrum mode, the circuit first adjusts to an intermediate divisor value, allowing the VCO frequency to stabilize near the target before completing the full transition. This prevents frequency overshoot and maintains stability even during frequent divisor number changes.
Solution Approach 2:
The patent implements feedback by using a phase-locked loop (PLL) that continuously monitors the output frequency and adjusts the divisor number accordingly. The PLL compares the actual output frequency with the target frequency and provides feedback control, ensuring that frequency transitions are accurate and stable. This feedback mechanism prevents frequency overshoot and maintains frequency stability during spread spectrum operation.
Data Source
Figure 1
Figure 2a~2b
Figure 3a
AI summary
The present disclosure provides a clock circuit and related method improving frequency hopping. The clock circuit may comprise a frequency divider and a frequency hopping circuit. The frequency divider may perform a frequency division according to a first divisor number. When hopping to a frequency or a spread spectrum range which is corresponding to an input number, if a convergence condition is not satisfied, the frequency hopping circuit may perform a stepping operation to update the first divisor number from a previous value to a current value which may not equal the input number.