Clock Frequency Monitoring via Internal Phase-Locked Reference
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Solution Overview
Problem
Current clock frequency synchronization technologies lack a means to check clock accuracy, particularly when a standby-system clock is used, requiring external references like GPS or cesium oscillators.
Innovation Solution
A clock frequency monitoring apparatus that includes phase comparators, filters, and an oscillator to compare and synchronize clock phases, determining frequency abnormalities by monitoring the variation amplitude of output signals, eliminating the need for external references.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a standby-system clock is used for frequency synchronization, then reliability is improved through redundancy, but the ability to check clock accuracy deteriorates because external references like GPS or cesium oscillators are required
Solution Approach 1:
The monitoring apparatus uses the synchronous clock itself as the reference for monitoring the standby-system clock, eliminating the need for external references. The phase comparator compares the standby clock against the synchronous clock generated by the oscillation circuit, allowing the system to self-monitor without GPS or cesium oscillators.
Solution Approach 2:
The oscillation circuit acts as an intermediary that generates a synchronous clock serving as a local reference. This intermediary reference enables the monitoring function without requiring direct connection to external time standards, bridging the gap between redundancy and accuracy checking.
2Measurement precision
If external references like GPS or cesium oscillators are used to check clock accuracy, then measurement precision is improved, but device complexity and cost increase
Solution Approach 1:
The system performs self-monitoring by using its own synchronous clock output as the reference standard. The phase comparator and low-pass filter process the phase difference signal internally, allowing the apparatus to check clock accuracy without external equipment.
Solution Approach 2:
The oscillation circuit creates a copy of the frequency-synchronized clock signal that serves as a reference for monitoring. This copied signal is sufficient for detecting frequency abnormalities in the standby clock without needing the original external reference.
3Reliability
If GPS or cesium oscillators are deployed for monitoring standby clock frequency, then reliability is improved, but cost increases
Solution Approach 1:
The monitoring function is achieved through self-service mechanisms within the apparatus. The oscillation circuit generates a reference signal, and the phase comparator monitors the standby clock against this internal reference, eliminating the need for expensive external equipment like GPS receivers or cesium oscillators.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables accurate monitoring of frequency differences between input and synchronous clocks, improving reliability without requiring GPS or cesium oscillators, thus reducing costs and dependency on external references.
Implementation Method 1
a phase comparator configured to compare a phase of a synchronous clock phase-synchronized with the input clock or a first frequency-divided clock obtained by frequency-dividing the synchronous clock with a phase of the input clock
Implementation Method 2
a low-pass filter configured to low-pass filter an output signal of the phase comparator
Implementation Method 3
an oscillator configured to generate the synchronous clock having a frequency corresponding to an output signal (for example, a control value) of the first filter
Data Source
AI summary
[Problem] To monitor a frequency difference between an input clock and a synchronous clock synchronized with the input clock.[Solution] A clock frequency monitoring apparatus that monitors the frequency of an input clock 18a includes a phase comparator 12 that compares a phase of a synchronous clock 18e phase-synchronized with the input clock 18a or a first frequency-divided clock 18f obtained by frequency-dividing the synchronous clock 18e with the phase of the input clock 18a, a filter 13 that low-pass filters an output signal of the phase comparator 12, an oscillator 14 that generates the synchronous clock 18e having a frequency corresponding to a control value from the filter 13, and a determiner 19 that determines that the frequency of the input clock 18a is abnormal when the variation amplitude of the output signal of the filter 13 is equal to or more than a predetermined range.