Clock Frequency Detection Circuit Without Extra Selection Pins
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Solution Overview
Problem
Conventional integrated circuits (ICs) require additional pins to select among multiple reference frequencies, leading to space constraints in compact electronic designs, as each reference frequency necessitates an extra pin for proper functionality.
Innovation Solution
A frequency detection apparatus comprising a frequency conversion circuit and an analog conversion circuit that automatically determines the input frequency by generating an analog signal and a discriminating signal, allowing the back-end circuit to adjust accordingly without the need for extra pins, utilizing a charge circuit with switches and capacitors to produce an analog voltage proportional to the input frequency, and comparators to determine the frequency interval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If extra pins are added to select different reference frequencies, then the IC can support multiple reference frequencies, but the device size increases
Solution Approach 1:
The frequency detection circuit automatically detects the input frequency and generates corresponding control signals without requiring external pin inputs. The circuit self-determines the frequency type (25MHz or 48MHz) and generates appropriate frequency division control signals, eliminating the need for manual pin-based frequency selection.
Solution Approach 2:
The patent replaces the mechanical pin-based selection mechanism with an automatic frequency detection system using frequency conversion circuits and analog conversion circuits. Instead of using physical pins to select frequencies, the system uses electrical signal processing to automatically identify and respond to different frequency inputs.
2Adaptability or versatility
If more reference frequencies are supported, then the IC becomes more versatile, but the number of required pins increases
Solution Approach 1:
The frequency detection circuit serves multiple functions: it detects different input frequencies (25MHz and 48MHz), determines frequency intervals, generates corresponding control signals, and controls frequency division operations. This single circuit handles all frequency selection tasks that would otherwise require multiple pins and complex selection logic.
Solution Approach 2:
The patent introduces frequency conversion circuits and analog conversion circuits as intermediaries between the input clock signal and the frequency division control logic. These intermediary circuits convert the input frequency into an analog signal that can be processed to generate appropriate control signals, enabling flexible frequency support without direct pin-based selection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables automatic frequency detection and adjustment within the IC, reducing the need for extra pins and conserving space, thus aligning with the goal of developing electronic products for minimal size while ensuring proper functionality across various reference frequencies.
Implementation Method 1
a first capacitor C1 having a third end 131 outputting an analog voltage V, and a second capacitor C2 having a fourth end 141 coupled to the second end 112 of the first switch 11
Data Source
AI summary
A frequency detection apparatus and method are provided. The frequency detection apparatus includes a frequency conversion circuit and an analog conversion circuit. The frequency conversion circuit receives an input clock, and generates an analog signal corresponding to a frequency of the input clock based on the frequency of the input clock. The analog conversion circuit is coupled to the frequency conversion circuit, receives the analog signal, and generates a discriminating signal corresponding to the frequency of the input clock based on the analog signal, where the discriminating signal represents a frequency interval of the input clock.