Clock Frequency Shifting with SSB Mixing to Avoid Harmonics
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Solution Overview
Problem
Current signal processing and transmission techniques are inefficient in optimizing data transmission, particularly in implementing a frequency shift function for clock signals, leading to suboptimal performance in radio frequency data transmission chains.
Innovation Solution
An electronic device is configured with a frequency shift function that includes a delay element, a frequency divider circuit, integrator circuits, and a single sideband mixer circuit to generate a frequency offset signal, allowing for efficient frequency manipulation and transmission by dividing the clock signal's frequency and applying a compression function to achieve improved signal processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional frequency shift techniques are used for clock signals, then data transmission can be performed, but harmonic interference occurs and transmission efficiency is reduced
Solution Approach 1:
The frequency shift operation is segmented into multiple discrete steps: integer frequency division by N, quadrature signal generation with T/4 delay, and incremental frequency adjustments. This segmentation allows precise control over the frequency shifting process, enabling selection of division ratios that avoid harmonic interference while achieving the desired frequency offset.
Solution Approach 2:
The patent changes the frequency division ratio parameter N to optimize transmission. By selecting specific values for N (such as N=4, 8, 16, etc.), the system can achieve frequency shifting while avoiding harmonic interference. The quadrature delay parameter T/4 is also optimized to ensure proper phase relationships and eliminate harmful harmonics.
2Object-generated harmful factors
If frequency division and integration circuits are added to implement the frequency shift function, then harmonic interference is avoided, but device complexity increases
Solution Approach 1:
The delay element serves multiple functions: it provides the T/4 quadrature delay needed for frequency shifting, generates the phase-shifted signals required for single-sideband modulation, and enables the frequency division operation. This multi-functionality reduces the need for separate dedicated circuits, thereby limiting the increase in device complexity.
Solution Approach 2:
The frequency division, integration, and frequency shifting operations are nested within a unified frequency shift function block. The integer division by N is nested within the broader frequency shift operation, and the quadrature signal generation is nested within the same functional unit. This nested architecture consolidates multiple functions into a compact structure, minimizing the increase in device complexity.
Data Source
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AI summary
The present description relates to an electronic device (200) configured to apply a frequency shift function to a first signal (Clk_F) having a first frequency (F) comprising: - a delay element (206) adapted to provide a second signal (Clk_F_D) corresponding to the first signal delayed by a duration equal to a first period of said first signal (Clk_F) divided by four; - a branch comprising successively a first circuit (201) adapted to divide the frequency of a signal by a number, a second integrator circuit (203), said branch being adapted to provide a third signal (Q_comp) and a fourth signal (I_comp); and a third single-sideband mixer circuit (208).