Clock Frequency Switching for Power Saving in Image Forming Apparatus
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Solution Overview
Problem
Image forming apparatuses face challenges in achieving power saving while maintaining accurate timing for mechanical control processing when switching clock frequencies, as changing clock frequencies can disrupt timing determination during mechanical control operations.
Innovation Solution
An image forming apparatus with a System on a Chip (SoC) that integrates a clock supply circuit, a first CPU for image data processing, and a second CPU for control processing, which determines processing loads and adjusts clock frequencies accordingly, ensuring the second CPU changes its time measurement method to maintain consistent execution timing during frequency switching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the clock frequency is increased to accelerate image processing, then processing speed is improved, but power consumption increases
Solution Approach 1:
The clock frequency is dynamically adjusted based on the processing load. The frequency is increased to a first clock frequency when image processing with high load is detected, and reduced to a second clock frequency when the load is low, allowing the system to adapt its performance and power consumption to actual needs
Solution Approach 2:
The system changes the clock frequency parameter according to processing load conditions. By monitoring the processing load and adjusting the frequency parameter accordingly, the system achieves optimal balance between processing speed and power consumption for different operational states
2Use of energy by moving object
If the clock frequency is switched between high and low frequencies to save power, then power consumption is reduced, but timing determination accuracy deteriorates
Solution Approach 1:
The system performs preliminary actions by completing one process among a series of processes before switching the clock frequency, and starts the next process after switching. This ensures that timing-critical operations are completed at a stable frequency before transition, preventing timing errors in mechanical control
Solution Approach 2:
The second CPU acts as an intermediary that manages the transition between different clock frequencies. It monitors the processing load, determines when frequency switching is appropriate, and coordinates the switching timing to avoid disrupting mechanical control operations that depend on accurate timing
3Device complexity
If a single clock supply circuit is shared between mechanical control CPU and image processing CPU, then device complexity is reduced, but timing reliability deteriorates
Solution Approach 1:
The single clock supply circuit is designed to serve multiple functions by providing different clock frequencies to the same CPU at different times. The circuit can operate at a first frequency for image processing and a second frequency for mechanical control, making it a universal clock source that adapts to different operational requirements
Solution Approach 2:
The shared clock supply circuit dynamically adjusts its output frequency based on the operational mode. It switches between first and second clock frequencies according to the processing load and current operation type, allowing one circuit to reliably support both high-performance image processing and precision timing for mechanical control
Data Source
AI summary
An image forming apparatus has a clock supply circuit supplying a signal at a first clock frequency or a second clock frequency lower than the first frequency, a first CPU performing image data processing based on the signal, and a second CPU measuring time based on the signal to determine execution timing of each process performed in control processing. The image forming apparatus includes a load determination unit determining whether a load of the image data processing is higher than a reference level, and a control unit that switches the frequency to the first frequency when the load is higher than the reference level, and to the second frequency when the load is not higher. When the frequency switching occurs, the second CPU changes a method for measuring time. The second CPU completes one process before the switching and starts the next one after the switching.


