Clock Signal Frequency Transition to Keep Receiver PLL Locked
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Solution Overview
Problem
Conventional clock signal generation at the receiving end becomes unstable when the frequency of the clock signal from the transmitting end changes significantly, leading to abnormal operations, such as picture flicker in TV displays, due to hardware limitations, and traditional methods require terminating the transmission process to wait for a stable lock, which is not acceptable in all testing criteria.
Innovation Solution
A signal transmission system with a first clock signal generator that enters a frequency-unlocked state during a first time period when the second clock signal transitions from one frequency to another, while a second clock signal generator maintains a frequency-locked state by controlling the frequency transition over a longer second time period, ensuring the first clock signal generator remains locked, using a stepwise or smooth frequency transition to prevent instability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the clock signal frequency changes rapidly at the transmitting end, then the frequency transition speed is improved, but the receiving end clock generator cannot track the frequency variation, leading to frequency-unlocked state and instability
Solution Approach 1:
The patent applies periodic action by dividing the frequency transition into multiple periodic steps. The clock signal frequency changes in discrete increments rather than continuously, allowing the receiving end clock generator to track each step within its locking capability. This periodic frequency adjustment resolves the contradiction by making the transition speed compatible with the tracking ability of the phase-locked loop.
Solution Approach 2:
The patent implements dynamics by making the frequency transition process adaptive and controllable. The transmitting end dynamically adjusts the clock signal frequency based on detected requirements, and the receiving end dynamically responds by attempting to track the changes. This dynamic interaction allows the system to maintain reliability while achieving necessary frequency transitions.
2Reliability
If the receiving end waits for a stable lock after frequency change, then the clock signal stability is improved, but the transmission process must be terminated, causing display flicker and loss of on-screen display
Solution Approach 1:
The patent applies preliminary action by performing frequency transitions in small incremental steps before the receiving end loses lock. Instead of making a large frequency change that would cause loss of lock and require termination, the system preliminarily adjusts frequency in manageable increments, allowing continuous transmission throughout the transition process.
Solution Approach 2:
The patent implements continuity of useful action by maintaining the transmission process uninterrupted during frequency transitions. The frequency changes are coordinated so that the receiving end remains locked throughout the transition, ensuring continuous data transmission and preventing display flicker or loss of on-screen display functionality.
3Device complexity
If the clock generator hardware has limited tracking capability, then the device complexity is reduced, but the frequency transition range and speed are constrained
Solution Approach 1:
The patent applies segmentation by dividing the frequency transition into multiple smaller steps. Instead of requiring the clock generator to handle large frequency changes in a single step, the transition is segmented into incremental adjustments. This allows simpler hardware with limited tracking capability to achieve broader frequency transition ranges through cumulative small steps.
Solution Approach 2:
The patent implements parameter changes by modifying the frequency parameter in incremental amounts. The clock signal frequency is adjusted in controlled steps, changing the frequency parameter gradually rather than abruptly. This approach enables the system to achieve versatile frequency transitions while maintaining simple hardware design.
Data Source
AI summary
A signal transmission system (100, 1100) includes a first clock signal generator (122, 1122) and a second clock signal generator (112). The first clock signal generator (122, 1122) generates a first clock signal according to clock information derived from a transmitted signal, wherein the transmitted signal is changed in response to a frequency change of a second clock signal, and the first clock signal generator (122, 1122) enters a frequency-unlocked state if the second clock signal has a frequency transition from a first frequency to a second frequency during a first time period. The second clock signal generator (112) generates the second clock signal having the frequency transition from the first frequency to the second frequency during a second time period longer than the first time period such that the first clock signal generator (122, 1122) stays in a frequency-locked state during the second time period.