Clock Gate Activity Sensing for Instant Power and Noise Tracking
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Solution Overview
Problem
Existing digital logic circuits lack efficient methods for instantaneous and accurate tracking, limiting, and manipulating power consumption and noise dynamics, relying on slower and less precise paradigms.
Innovation Solution
Implementing fine grain clock gate signals that are collected and summed to determine the quantity of open clock gates, assigning activity weights to latches or flip-flops, and using adder circuits to generate an activity indication for instantaneous power and noise management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional power consumption tracking methods are used, then the system can monitor power usage, but the tracking is slow and imprecise
Solution Approach 1:
The patent replaces traditional mechanical/current-based power sensing with a digital logic-based activity sensing system. The adder circuit counts active clock gates to directly determine power consumption, eliminating the need for slow analog-to-digital conversion and providing instantaneous digital measurement of power usage.
Solution Approach 2:
The patent creates a digital copy of power consumption information by counting active clock gates. Instead of measuring physical current, the system generates a digital representation (count value) that directly corresponds to power consumption, enabling fast and precise tracking through digital logic operations.
2Loss of time
If fine grain clock gate signals are collected and summed using adder circuits, then instantaneous power sensing is achieved, but the device complexity increases
Solution Approach 1:
The patent segments the clocking system into individually monitorable clock gates, each associated with specific latches or flip-flops. This segmentation allows parallel counting of active gates across different segments, achieving instantaneous power sensing while organizing the complexity into manageable, modular units.
Solution Approach 2:
The adder circuit performs multiple functions: it counts active clock gates, generates power consumption information, and provides activity indications for noise management. This multi-functionality reduces the need for separate circuits for each purpose, thereby limiting the increase in device complexity despite the enhanced capabilities.
3Measurement precision
If activity weights are assigned to latches or flip-flops, then accurate power and noise management is enabled, but the manufacturing complexity increases
Solution Approach 1:
Activity weights are predetermined and assigned to latches or flip-flops during the design phase based on their switching characteristics. This preliminary action allows the manufacturing process to use fixed, pre-calculated weight values, simplifying fabrication while maintaining measurement accuracy through the pre-optimized activity weight assignments.
Data Source
AI summary
Clock enable signals are collected and summed. The number of simultaneously enabled clock enable signals can represent switching activity within a system and can be used as an indicator for power management, noise management, etc. of such a system. Digital switching activity sensing include performance of an operation to sum a quantity of open clock gates associated with a plurality of latches that are grouped into multiple subsets of latches. An activity indication is generated based, at least in part, on a result of the operation to sum the quantity of open clock gates associated with the plurality of latches.