Clock Gate Cloning Based on Switching Activity Clustering
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Solution Overview
Problem
Conventional clock gate schemes, such as XOR clock gating, are inefficient when dealing with clocked circuit elements having varying input/output switching activities, leading to inaccurate proxies for power consumption and suboptimal clock tree optimization.
Innovation Solution
A switching activity-aware clock gate cloning process that generates clones of clock gates based on the input/output switching activity of individual clocked circuit elements, clustering those with similar activities separately to improve the efficiency of XOR gating and optimize power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional clock gate schemes (e.g., XOR clock gating) are used, then the clock tree structure is simple, but the power consumption optimization is insufficient when dealing with clocked circuit elements having varying switching activities
Solution Approach 1:
The patent segments the clocked circuit elements into different groups based on their switching activity characteristics. Elements with similar switching activities are clustered together and assigned to different clock gate clones, while elements with dissimilar switching activities are separated. This segmentation allows each clock gate clone to be optimized for its specific subset of elements, improving overall power consumption optimization without creating an entirely complex system from scratch.
Solution Approach 2:
The patent applies local quality by creating multiple clock gate clones with different gating strategies tailored to the specific switching activity characteristics of their respective clocked circuit element groups. Each clock gate clone is locally optimized for the elements it serves, using XOR gating where appropriate and direct gating where necessary, rather than applying a uniform gating strategy across the entire clock tree.
2Measurement precision
If clocked circuit elements with varying switching activities are grouped together under a single clock gate, then the clock tree structure remains simple, but the accuracy of power consumption proxy becomes insufficient
Solution Approach 1:
The patent applies local quality by creating multiple clock gate clones with different gating strategies tailored to the specific switching activity characteristics of their respective clocked circuit element groups. Each clock gate clone is locally optimized for the elements it serves, using XOR gating where appropriate and direct gating where necessary, rather than applying a uniform gating strategy across the entire clock tree.
Solution Approach 2:
The patent changes the gating parameter strategy based on the switching activity characteristics of individual clocked circuit elements. Elements with high switching activity use XOR gating with enable signals that dynamically adjust clock delivery, while elements with low or constant switching activity may use direct gating. This parameter change approach allows accurate power consumption modeling by matching the gating behavior to the actual switching characteristics of each element.
3Ease of operation
If XOR gating is used for all clocked circuit elements, then the clock tree is easy to implement, but the delay balancing becomes suboptimal when switching activities vary significantly
Solution Approach 1:
The patent segments the clocked circuit elements into different groups based on their switching activity characteristics. Elements with similar switching activities are clustered together and assigned to different clock gate clones, while elements with dissimilar switching activities are separated. This segmentation allows each clock gate clone to be optimized for its specific subset of elements, improving overall power consumption optimization without creating an entirely complex system from scratch.
Solution Approach 2:
The patent applies local quality by creating multiple clock gate clones with different gating strategies tailored to the specific switching activity characteristics of their respective clocked circuit element groups. Each clock gate clone is locally optimized for the elements it serves, using XOR gating where appropriate and direct gating where necessary, rather than applying a uniform gating strategy across the entire clock tree.
Data Source
AI summary
Various embodiments provide for cloning a clock gate based on input/output switching activity of clocked circuit elements gated by the clock gate, where the cloning can be performed as part of a clock tree generation or optimization process performed by an electronic design automation (EDA) software.