Clock Gating Circuit with Local Frequency Conversion
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Solution Overview
Problem
Integrated circuits face high power consumption in distributing clock signals due to high capacitance wires, especially at higher frequencies, which limits functionality and performance, and modifying existing circuit designs to respond to both rising and falling edges is costly and impractical.
Innovation Solution
Distributing clock signals at a lower frequency than the operational frequency and using a clock converter to convert the signal back to the operational frequency near the functional circuits, maintaining performance while reducing power consumption without redesigning existing circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the clock signal frequency is increased to improve functional circuit performance, then the performance level is improved, but the power consumption of the clock distribution tree increases
Solution Approach 1:
The clock distribution system is segmented into two parts: a clock distribution tree that operates at a lower frequency to minimize power consumption, and a clock converter located near each functional circuit that converts the lower frequency clock signal to the required higher operational frequency. This segmentation allows the distribution infrastructure to be energy-efficient while local conversion maintains performance requirements.
Solution Approach 2:
The clock conversion function is implemented locally at or near each functional circuit rather than distributing the high-frequency clock signal throughout the entire distribution tree. This local quality approach ensures that only the necessary portion of the system (the functional circuit and its immediate surroundings) operates at high frequency, while the majority of the distribution infrastructure operates at lower frequency for energy efficiency.
2Use of energy by moving object
If the clock signal frequency is decreased to reduce power consumption, then the power consumption is reduced, but the functional circuit performance is limited
Solution Approach 1:
The system segments the clock frequency requirements: the distribution tree uses a lower frequency for energy efficiency, while local clock converters restore the higher frequency needed for functional circuit performance. This allows each part of the system to operate at the frequency appropriate for its function.
Solution Approach 2:
The clock converter acts as an intermediary device that bridges the frequency gap between the low-frequency distribution clock signal and the high-frequency operational clock signal required by functional circuits. This intermediary enables the distribution tree to operate efficiently while maintaining the performance requirements of the functional circuits.
3Use of energy by moving object
If existing functional circuits are modified to respond to both rising and falling edges to achieve half-frequency operation, then power consumption is reduced, but the design and manufacturing expenditure increases
Solution Approach 1:
Instead of modifying functional circuits to respond to both edges of a single-frequency clock signal (the conventional approach), this invention inverts the approach by keeping functional circuits unchanged and instead converting the clock frequency locally. This maintains compatibility with existing designs while achieving the power savings of lower-frequency distribution.
Solution Approach 2:
The clock converter provides a universal solution that can be applied to any existing functional circuit without requiring circuit-specific modifications. This multi-functional approach allows the same clock distribution infrastructure to serve diverse functional circuits while maintaining their original design characteristics and edge-response requirements.
Data Source
AI summary
An integrated circuit 2 comprises a functional circuit 4, 6 which is arranged to operate in response to an operational clock signal having an operational clock frequency. To conserve power, the clock signal is distributed across the integrated circuit 2 at a distribution clock frequency which is less than the operational clock frequency. A clock converter 10 is provided to convert the distribution clock signal into the operational clock signal for controlling operation of the functional circuit 4, 6.