Clock Generator Circuit Frequency Multiplication

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Solution Overview

Problem

Existing clock generator circuits based on relaxation oscillators face challenges in achieving accurate clock signal multiplication without increasing current supply or varying capacitor values, while maintaining phase and time delay specifications over a temperature range.

Innovation Solution

A clock generator circuit that uses a relaxation oscillator to generate periodic ramp signals compared to reference voltages, with flip-flops and logical ORing to produce output signals at frequencies that are multiples of the relaxation oscillator frequency, without increasing the current supply or relaxation oscillator frequency, utilizing an analog multiplier circuit to achieve this.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the relaxation oscillator frequency is increased to achieve higher clock multiplication, then the maximum achievable frequency increases, but the accuracy of the multiplied clock frequency deteriorates due to propagation delay variations

Engineering Contradiction:

Improveclock frequencyVSAvoidfrequency accuracy

Core Design Contradiction:

SpeedVSMeasurement precision

Solution Approach 1:

The patent segments the frequency multiplication process into two independent stages: (1) a relaxation oscillator generating a base frequency with high accuracy, and (2) a separate counter circuit multiplying this frequency. This segmentation prevents propagation delay errors from affecting the base frequency accuracy while still achieving high multiplied frequencies.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces a counter circuit as an intermediary between the relaxation oscillator and the final clock output. The counter multiplies the frequency without introducing additional propagation delay errors to the base frequency measurement, thereby maintaining accuracy while achieving frequency multiplication.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Manufacturing precision

If laser trimming is performed on resistors to achieve desired relaxation oscillator frequency at room temperature, then the initial frequency specification is met, but the frequency varies significantly over the temperature range

Engineering Contradiction:

Improvefrequency specification at room temperatureVSAvoidfrequency stability over temperature

Core Design Contradiction:

Manufacturing precisionVSStability of the object's composition

Solution Approach 1:

The patent employs temperature compensation mechanisms that use feedback to adjust the relaxation oscillator frequency based on temperature variations. This feedback loop counteracts the drift caused by laser trimming limitations, maintaining frequency stability across the temperature range while preserving the initial room temperature specification.

Inventive Principle:

Principle #23Feedback

3Speed

If the current supply to the relaxation oscillator is increased to achieve higher frequency multiplication, then the maximum frequency increases, but the power consumption and circuit performance deteriorate

Engineering Contradiction:

Improveclock frequencyVSAvoidpower consumption

Core Design Contradiction:

SpeedVSUse of energy by moving object

Solution Approach 1:

The patent replaces the mechanical approach of increasing current to achieve frequency multiplication with an electronic counting mechanism. The counter circuit multiplies frequency without requiring additional current to the relaxation oscillator, thereby avoiding increased power consumption while achieving the desired frequency multiplication.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

4Speed

If the relaxation oscillator frequency is increased to meet clock frequency requirements, then the clock frequency specification is met, but the phase and time delay specifications cannot be maintained

Engineering Contradiction:

Improveclock frequencyVSAvoidphase and time delay specification

Core Design Contradiction:

SpeedVSReliability

Solution Approach 1:

The patent segments the frequency generation and phase control functions into separate circuits. The relaxation oscillator generates the base frequency with accurate phase relationships, while a counter circuit handles frequency multiplication without disrupting the phase timing specifications.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS7375599B2Analog circuit and method for multiplying clock frequency

Publication Date: 2008.05.20 TEXAS INSTRUMENTS INC

AI summary

A signal generating circuit includes a relaxation oscillator operating to alternately generate a first ramp signal that is periodic at a frequency of the relaxation oscillator and a second ramp signal that is periodic at the frequency of the relaxation oscillator and is out of phase with respect to the first ramp signal The first ramp signal is compared to a first reference voltage and the state of a first flip-flop is changed if the first ramp signal exceeds the first reference voltage. The second ramp signal is compared to the first reference voltage and the state of a second flip-flop is changed if the second ramp signal exceeds the first reference voltage. The first flip-flop is reset in response to a first level of the first ramp signal and the second flip-flop is reset in response to a second level of the second ramp signal. A logical ORing function is performed on an output of the first flip-flop and an output of the second flip-flop to produce an output signal having a frequency that is a multiple of the relaxation oscillator frequency.